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Documentation improvements - put driver example code into its own section, fix incorr...
[pub/USBasp.git]
/
Projects
/
XPLAINBridge
/
Lib
/
SoftUART.c
diff --git
a/Projects/XPLAINBridge/Lib/SoftUART.c
b/Projects/XPLAINBridge/Lib/SoftUART.c
index
5de3659
..
7667bfa
100644
(file)
--- a/
Projects/XPLAINBridge/Lib/SoftUART.c
+++ b/
Projects/XPLAINBridge/Lib/SoftUART.c
@@
-67,11
+67,11
@@
void SoftUART_Init(void)
SoftUART_SetBaud(9600);
/* Setup reception timer compare ISR */
SoftUART_SetBaud(9600);
/* Setup reception timer compare ISR */
- TIMSK
2 = (1 << ICIE2
);
+ TIMSK
1 = (1 << OCIE1A
);
/* Setup transmission timer compare ISR and start the timer */
/* Setup transmission timer compare ISR and start the timer */
- TIMSK3 = (1 <<
ICIE3
);
- TCCR3B = ((1 << CS30) | (1 << WGM3
3) | (1 << WGM3
2));
+ TIMSK3 = (1 <<
OCIE3A
);
+ TCCR3B = ((1 << CS30) | (1 << WGM32));
}
/** ISR to detect the start of a bit being sent to the software UART. */
}
/** ISR to detect the start of a bit being sent to the software UART. */
@@
-81,7
+81,7
@@
ISR(INT0_vect, ISR_BLOCK)
RX_BitsRemaining = 8;
/* Reset the bit reception timer */
RX_BitsRemaining = 8;
/* Reset the bit reception timer */
- TCNT
2
= 0;
+ TCNT
1
= 0;
/* Check to see that the pin is still low (prevents glitches from starting a frame reception) */
if (!(SRXPIN & (1 << SRX)))
/* Check to see that the pin is still low (prevents glitches from starting a frame reception) */
if (!(SRXPIN & (1 << SRX)))
@@
-90,12
+90,12
@@
ISR(INT0_vect, ISR_BLOCK)
EIMSK = 0;
/* Start the reception timer */
EIMSK = 0;
/* Start the reception timer */
- TCCR
2B = ((1 << CS20) | (1 << WGM23) | (1 << WGM2
2));
+ TCCR
1B = ((1 << CS10) | (1 << WGM1
2));
}
}
/** ISR to manage the reception of bits to the software UART. */
}
}
/** ISR to manage the reception of bits to the software UART. */
-ISR(TIMER
2_CAPT
_vect, ISR_BLOCK)
+ISR(TIMER
1_COMPA
_vect, ISR_BLOCK)
{
/* Cache the current RX pin value for later checking */
uint8_t SRX_Cached = (SRXPIN & (1 << SRX));
{
/* Cache the current RX pin value for later checking */
uint8_t SRX_Cached = (SRXPIN & (1 << SRX));
@@
-114,7
+114,7
@@
ISR(TIMER2_CAPT_vect, ISR_BLOCK)
else
{
/* Disable the reception timer as all data has now been received, re-enable start bit detection ISR */
else
{
/* Disable the reception timer as all data has now been received, re-enable start bit detection ISR */
- TCCR
2
B = 0;
+ TCCR
1
B = 0;
EIFR = (1 << INTF0);
EIMSK = (1 << INT0);
EIFR = (1 << INTF0);
EIMSK = (1 << INT0);
@@
-125,7
+125,7
@@
ISR(TIMER2_CAPT_vect, ISR_BLOCK)
}
/** ISR to manage the transmission of bits via the software UART. */
}
/** ISR to manage the transmission of bits via the software UART. */
-ISR(TIMER3_C
APT
_vect, ISR_BLOCK)
+ISR(TIMER3_C
OMPA
_vect, ISR_BLOCK)
{
/* Check if transmission has finished */
if (TX_BitsRemaining)
{
/* Check if transmission has finished */
if (TX_BitsRemaining)