Added const where possible to the source functions in the Projects directory.

[pub/USBasp.git] / Projects / AVRISP / Lib / XPROG / XMEGANVM.c

diff --git a/Projects/AVRISP/Lib/XPROG/XMEGANVM.c b/Projects/AVRISP/Lib/XPROG/XMEGANVM.c
index 6280f60..c83ae01 100644 (file)
--- a/Projects/AVRISP/Lib/XPROG/XMEGANVM.c
+++ b/Projects/AVRISP/Lib/XPROG/XMEGANVM.c
@@ -58,10 +58,10 @@ void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
 void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)\r
 {\r
        /* Send the given 32-bit address to the target, LSB first */\r
 void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)\r
 {\r
        /* Send the given 32-bit address to the target, LSB first */\r

-       XPROGTarget_SendByte(AbsoluteAddress &  0xFF);\r
-       XPROGTarget_SendByte(AbsoluteAddress >> 8);\r
-       XPROGTarget_SendByte(AbsoluteAddress >> 16);\r
-       XPROGTarget_SendByte(AbsoluteAddress >> 24);\r
+       XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);\r
+       XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);\r
+       XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[2]);\r
+       XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]);\r

 }\r
 \r
 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
 }\r
 \r
 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r


@@ -71,24 +71,13 @@ void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
  */\r
 bool XMEGANVM_WaitWhileNVMBusBusy(void)\r
 {\r
  */\r
 bool XMEGANVM_WaitWhileNVMBusBusy(void)\r
 {\r

-       TCNT0 = 0;\r
-       TIFR0 = (1 << OCF1A);\r
-                       \r
-       uint8_t TimeoutMS = XMEGA_NVM_BUSY_TIMEOUT_MS;\r
-       \r

        /* Poll the STATUS register to check to see if NVM access has been enabled */\r
        /* Poll the STATUS register to check to see if NVM access has been enabled */\r

-       while (TimeoutMS)\r
+       while (TimeoutMSRemaining)\r

        {\r
                /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */\r
                XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
                if (XPROGTarget_ReceiveByte() & PDI_STATUS_NVM)\r
                  return true;\r
        {\r
                /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */\r
                XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
                if (XPROGTarget_ReceiveByte() & PDI_STATUS_NVM)\r
                  return true;\r

-\r
-               if (TIFR0 & (1 << OCF1A))\r
-               {\r
-                       TIFR0 = (1 << OCF1A);\r
-                       TimeoutMS--;\r
-               }\r

        }\r
        \r
        return false;\r
        }\r
        \r
        return false;\r


@@ -101,13 +90,8 @@ bool XMEGANVM_WaitWhileNVMBusBusy(void)
  */\r
 bool XMEGANVM_WaitWhileNVMControllerBusy(void)\r
 {\r
  */\r
 bool XMEGANVM_WaitWhileNVMControllerBusy(void)\r
 {\r

-       TCNT0 = 0;\r
-       TIFR0 = (1 << OCF1A);\r
-                       \r
-       uint8_t TimeoutMS = XMEGA_NVM_BUSY_TIMEOUT_MS;\r
-       \r

        /* Poll the NVM STATUS register while the NVM controller is busy */\r
        /* Poll the NVM STATUS register while the NVM controller is busy */\r

-       while (TimeoutMS)\r
+       while (TimeoutMSRemaining)\r

        {\r
                /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */\r
                XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
        {\r
                /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */\r
                XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r


@@ -116,12 +100,6 @@ bool XMEGANVM_WaitWhileNVMControllerBusy(void)
                /* Check to see if the BUSY flag is still set */\r
                if (!(XPROGTarget_ReceiveByte() & (1 << 7)))\r
                  return true;\r
                /* Check to see if the BUSY flag is still set */\r
                if (!(XPROGTarget_ReceiveByte() & (1 << 7)))\r
                  return true;\r

-\r
-               if (TIFR0 & (1 << OCF1A))\r
-               {\r
-                       TIFR0 = (1 << OCF1A);\r
-                       TimeoutMS--;\r
-               }\r

        }\r
        \r
        return false;\r
        }\r
        \r
        return false;\r


@@ -158,22 +136,24 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
        if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
          return false;\r
        \r
        if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
          return false;\r
        \r

-       *CRCDest = 0;\r
+       uint32_t MemoryCRC = 0;\r

        \r
        /* Read the first generated CRC byte value */\r
        XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
        XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);\r
        \r
        /* Read the first generated CRC byte value */\r
        XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
        XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);\r

-       *CRCDest  = XPROGTarget_ReceiveByte();\r
+       MemoryCRC  = XPROGTarget_ReceiveByte();\r

 \r
        /* Read the second generated CRC byte value */\r
        XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
        XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT1);\r
 \r
        /* Read the second generated CRC byte value */\r
        XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
        XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT1);\r

-       *CRCDest |= ((uint16_t)XPROGTarget_ReceiveByte() << 8);\r
+       MemoryCRC |= ((uint16_t)XPROGTarget_ReceiveByte() << 8);\r

 \r
        /* Read the third generated CRC byte value */\r
        XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
        XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT2);\r
 \r
        /* Read the third generated CRC byte value */\r
        XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
        XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT2);\r

-       *CRCDest |= ((uint32_t)XPROGTarget_ReceiveByte() << 16);\r
+       MemoryCRC |= ((uint32_t)XPROGTarget_ReceiveByte() << 16);\r
+       \r
+       *CRCDest = MemoryCRC;\r

        \r
        return true;\r
 }\r
        \r
        return true;\r
 }\r


@@ -186,7 +166,7 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
  *\r
  *  \return Boolean true if the command sequence complete successfully\r
  */\r
  *\r
  *  \return Boolean true if the command sequence complete successfully\r
  */\r

-bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)\r
+bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r

 {\r
        /* Wait until the NVM controller is no longer busy */\r
        if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
 {\r
        /* Wait until the NVM controller is no longer busy */\r
        if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r


@@ -207,7 +187,7 @@ bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const
                \r
        /* Send a LD command with indirect access and postincrement to read out the bytes */\r
        XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
                \r
        /* Send a LD command with indirect access and postincrement to read out the bytes */\r
        XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r

-       for (uint16_t i = 0; i < ReadSize; i++)\r
+       while (ReadSize--)\r

          *(ReadBuffer++) = XPROGTarget_ReceiveByte();\r
        \r
        return true;\r
          *(ReadBuffer++) = XPROGTarget_ReceiveByte();\r
        \r
        return true;\r


@@ -253,8 +233,8 @@ bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAd
  *  \return Boolean true if the command sequence complete successfully\r
  */\r
 bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
  *  \return Boolean true if the command sequence complete successfully\r
  */\r
 bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r

-                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
-                               const uint8_t* WriteBuffer, const uint16_t WriteSize)\r
+                              const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
+                              const uint8_t* WriteBuffer, uint16_t WriteSize)\r

 {\r
        if (PageMode & XPRG_PAGEMODE_ERASE)\r
        {\r
 {\r
        if (PageMode & XPRG_PAGEMODE_ERASE)\r
        {\r


@@ -294,7 +274,7 @@ bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t Eras
                        \r
                /* Send a ST command with indirect access and postincrement to write the bytes */\r
                XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
                        \r
                /* Send a ST command with indirect access and postincrement to write the bytes */\r
                XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r

-               for (uint16_t i = 0; i < WriteSize; i++)\r
+               while (WriteSize--)\r

                  XPROGTarget_SendByte(*(WriteBuffer++));\r
        }\r
        \r
                  XPROGTarget_SendByte(*(WriteBuffer++));\r
        }\r
        \r