this software.\r
*/\r
\r
-#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
/** \file\r
*\r
* Target-related functions for the PDI Protocol decoder.\r
#define INCLUDE_FROM_PDITARGET_C\r
#include "PDITarget.h"\r
\r
-volatile bool IsSending;\r
+#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
+\r
+/** Flag to indicate if the USART is currently in Tx or Rx mode. */\r
+volatile bool IsSending;\r
\r
#if !defined(PDI_VIA_HARDWARE_USART)\r
-volatile uint16_t DataBits;\r
-volatile uint8_t BitCount;\r
+/** Software USART raw frame bits for transmission/reception. */\r
+volatile uint16_t SoftUSART_Data;\r
+\r
+/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
+#define SoftUSART_BitCount GPIOR2\r
\r
-ISR(TIMER0_COMPA_vect, ISR_BLOCK)\r
+\r
+/** ISR to manage the software USART when bit-banged USART mode is selected. */\r
+ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
{\r
- BITBANG_PDICLOCK_PORT ^= BITBANG_PDICLOCK_MASK;\r
+ /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
+ BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
\r
/* If not sending or receiving, just exit */\r
- if (!(BitCount))\r
+ if (!(SoftUSART_BitCount))\r
return;\r
- \r
- /* Check to see if the current clock state is on the rising or falling edge */\r
- bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);\r
-\r
- if (IsSending && !IsRisingEdge)\r
- {\r
- if (DataBits & 0x01)\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- else\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK; \r
\r
- DataBits >>= 1;\r
- BitCount--;\r
- }\r
- else if (!IsSending && IsRisingEdge)\r
+ /* Check to see if we are at a rising or falling edge of the clock */\r
+ if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r
{\r
+ /* If at rising clock edge and we are in send mode, abort */\r
+ if (IsSending)\r
+ return;\r
+ \r
/* Wait for the start bit when receiving */\r
- if ((BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK))\r
+ if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
return;\r
\r
- if (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK)\r
- DataBits |= (1 << (BITS_IN_FRAME - 1));\r
+ /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
+ * be discarded leaving the data to be byte-aligned for quick access */\r
+ if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
+ SoftUSART_Data |= (1 << (BITS_IN_FRAME - 1));\r
\r
- DataBits >>= 1;\r
- BitCount--;\r
+ SoftUSART_Data >>= 1;\r
+ SoftUSART_BitCount--;\r
}\r
-}\r
-\r
-void PDITarget_EnableTargetPDI(void)\r
-{\r
- /* Set DATA and CLOCK lines to outputs */\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
- \r
- /* Set DATA line high for 90ns to disable /RESET functionality */\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
-\r
- /* Fire timer compare ISR every 160 cycles */\r
- OCR0A = 20;\r
- TCCR0A = (1 << WGM01);\r
- TCCR0B = (1 << CS01);\r
- TIMSK0 = (1 << OCIE0A);\r
-}\r
-\r
-void PDITarget_DisableTargetPDI(void)\r
-{\r
- /* Set DATA and CLOCK lines to inputs */\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
- \r
- /* Tristate DATA and CLOCK lines */\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
-\r
- TCCR0B = 0;\r
-}\r
-\r
-void PDITarget_SendByte(uint8_t Byte)\r
-{\r
- bool IsOddBitsSet = false;\r
- \r
- /* Compute Even parity bit */\r
- for (uint8_t i = 0; i < 8; i++)\r
+ else\r
{\r
- if (Byte & (1 << i))\r
- IsOddBitsSet = !(IsOddBitsSet);\r
- }\r
-\r
- /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
- DataBits = ((uint16_t)IsOddBitsSet << 10) | ((uint16_t)Byte << 1) | (1 << 0);\r
-\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
-\r
- IsSending = true;\r
- BitCount = BITS_IN_FRAME;\r
- while (BitCount);\r
-\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
-}\r
+ /* If at falling clock edge and we are in receive mode, abort */\r
+ if (!IsSending)\r
+ return;\r
\r
-uint8_t PDITarget_ReceiveByte(void)\r
-{\r
- IsSending = false;\r
- BitCount = BITS_IN_FRAME;\r
- while (BitCount);\r
+ /* Set the data line to the next bit value */\r
+ if (SoftUSART_Data & 0x01)\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ else\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK; \r
\r
- return (DataBits >> 1);\r
+ SoftUSART_Data >>= 1;\r
+ SoftUSART_BitCount--;\r
+ }\r
}\r
+#endif\r
\r
-void PDITarget_SendBreak(void)\r
-{\r
- DataBits = 0;\r
-\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
-\r
- IsSending = true;\r
- BitCount = BITS_IN_FRAME;\r
- while (BitCount);\r
-\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
-}\r
-#else\r
+/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r
void PDITarget_EnableTargetPDI(void)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Set Tx and XCK as outputs, Rx as input */\r
DDRD |= (1 << 5) | (1 << 3);\r
DDRD &= ~(1 << 2);\r
\r
- /* Set DATA line high for 90ns to disable /RESET functionality */\r
+ /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
PORTD |= (1 << 3);\r
asm volatile ("NOP"::);\r
asm volatile ("NOP"::);\r
\r
/* Set up the synchronous USART for XMEGA communications - \r
8 data bits, even parity, 2 stop bits */\r
- UBRR1 = 10;\r
+ UBRR1 = (F_CPU / 1000000UL);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
\r
/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
PDITarget_SendBreak();\r
PDITarget_SendBreak();\r
+#else\r
+ /* Set DATA and CLOCK lines to outputs */\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
+ \r
+ /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ asm volatile ("NOP"::);\r
+ asm volatile ("NOP"::);\r
+\r
+ /* Fire timer compare ISR every 100 cycles to manage the software USART */\r
+ OCR1A = 80;\r
+ TCCR1B = (1 << WGM12) | (1 << CS10);\r
+ TIMSK1 = (1 << OCIE1A);\r
+ \r
+ PDITarget_SendBreak();\r
+ PDITarget_SendBreak();\r
+#endif\r
}\r
\r
+/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
void PDITarget_DisableTargetPDI(void)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Turn off receiver and transmitter of the USART, clear settings */\r
UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
UCSR1B = 0;\r
/* Set all USART lines as input, tristate */\r
DDRD &= ~((1 << 5) | (1 << 3));\r
PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
+#else\r
+ /* Set DATA and CLOCK lines to inputs */\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
+ \r
+ /* Tristate DATA and CLOCK lines */\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
+\r
+ TCCR0B = 0;\r
+#endif\r
}\r
\r
-void PDITarget_SendByte(uint8_t Byte)\r
+/** Sends a byte via the USART.\r
+ *\r
+ * \param[in] Byte Byte to send through the USART\r
+ */\r
+void PDITarget_SendByte(const uint8_t Byte)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Switch to Tx mode if currently in Rx mode */\r
if (!(IsSending))\r
{\r
PORTD |= (1 << 3);\r
DDRD |= (1 << 3);\r
\r
- UCSR1B &= ~(1 << RXEN1);\r
UCSR1B |= (1 << TXEN1);\r
+ UCSR1B &= ~(1 << RXEN1);\r
\r
IsSending = true;\r
}\r
\r
/* Wait until there is space in the hardware Tx buffer before writing */\r
while (!(UCSR1A & (1 << UDRE1)));\r
- UDR1 = Byte;\r
+ UCSR1A |= (1 << TXC1);\r
+ UDR1 = Byte;\r
+#else\r
+ /* Switch to Tx mode if currently in Rx mode */\r
+ if (!(IsSending))\r
+ {\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+\r
+ IsSending = true;\r
+ }\r
+\r
+ /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
+ uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
+\r
+ /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
+ uint8_t ParityData = Byte;\r
+ while (ParityData)\r
+ {\r
+ NewUSARTData ^= (1 << 9);\r
+ ParityData &= (ParityData - 1);\r
+ }\r
+\r
+ /* Wait until transmitter is idle before writing new data */\r
+ while (SoftUSART_BitCount);\r
+\r
+ /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
+ SoftUSART_Data = NewUSARTData;\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
+#endif\r
}\r
\r
+/** Receives a byte via the software USART, blocking until data is received.\r
+ *\r
+ * \return Received byte from the USART\r
+ */\r
uint8_t PDITarget_ReceiveByte(void)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Switch to Rx mode if currently in Tx mode */\r
if (IsSending)\r
{\r
/* Wait until a byte has been received before reading */\r
while (!(UCSR1A & (1 << RXC1)));\r
return UDR1;\r
+#else\r
+ /* Switch to Rx mode if currently in Tx mode */\r
+ if (IsSending)\r
+ {\r
+ while (SoftUSART_BitCount);\r
+\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+\r
+ IsSending = false;\r
+ }\r
+\r
+ /* Wait until a byte has been received before reading */\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
+ while (SoftUSART_BitCount);\r
+ \r
+ /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
+ return (uint8_t)SoftUSART_Data;\r
+#endif\r
}\r
\r
+/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
void PDITarget_SendBreak(void)\r
{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
/* Switch to Tx mode if currently in Rx mode */\r
if (!(IsSending))\r
{\r
}\r
\r
/* Need to do nothing for a full frame to send a BREAK */\r
- for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)\r
+ for (uint8_t i = 0; i < BITS_IN_FRAME; i++)\r
{\r
- /* Wait for rising edge of clock */\r
+ /* Wait for a full cycle of the clock */\r
while (PIND & (1 << 5));\r
- \r
- /* Wait for falling edge of clock */\r
while (!(PIND & (1 << 5)));\r
}\r
-}\r
+#else\r
+ /* Switch to Tx mode if currently in Rx mode */\r
+ if (!(IsSending))\r
+ {\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+\r
+ IsSending = true;\r
+ }\r
+ \r
+ while (SoftUSART_BitCount);\r
+\r
+ /* Need to do nothing for a full frame to send a BREAK */\r
+ SoftUSART_Data = 0x0FFF;\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
#endif\r
+}\r
+\r
+/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
+ * calculation.\r
+ *\r
+ * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
+ */\r
+bool PDITarget_WaitWhileNVMBusBusy(void)\r
+{\r
+ TCNT0 = 0;\r
+ TIFR0 = (1 << OCF1A);\r
+ \r
+ uint8_t TimeoutMS = PDI_NVM_TIMEOUT_MS;\r
+ \r
+ /* Poll the STATUS register to check to see if NVM access has been enabled */\r
+ while (TimeoutMS)\r
+ {\r
+ /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */\r
+ PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
+ if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)\r
+ return true;\r
+\r
+ if (TIFR0 & (1 << OCF1A))\r
+ {\r
+ TIFR0 = (1 << OCF1A);\r
+ TimeoutMS--;\r
+ }\r
+ }\r
+ \r
+ return false;\r
+}\r
\r
#endif\r
projects / pub / USBasp.git / blobdiff