Speed up bit-banged USART code in the AVRISP project.

[pub/USBasp.git] / Projects / AVRISP / Lib / PDITarget.c

diff --git a/Projects/AVRISP/Lib/PDITarget.c b/Projects/AVRISP/Lib/PDITarget.c
index 28df550..1bbb4d5 100644 (file)
--- a/Projects/AVRISP/Lib/PDITarget.c
+++ b/Projects/AVRISP/Lib/PDITarget.c
@@ -45,9 +45,8 @@ volatile bool     IsSending;
 /** Software USART raw frame bits for transmission/reception. */\r
 volatile uint16_t SoftUSART_Data;\r
 \r
 /** Software USART raw frame bits for transmission/reception. */\r
 volatile uint16_t SoftUSART_Data;\r
 \r

-/** Bits remaining to be sent or received via the software USART. */\r
-volatile uint8_t  SoftUSART_BitCount;\r
-\r
+/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
+#define SoftUSART_BitCount   GPIOR2\r

 \r
 /** ISR to manage the software USART when bit-banged USART mode is selected. */\r
 ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
 \r
 /** ISR to manage the software USART when bit-banged USART mode is selected. */\r
 ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r


@@ -59,21 +58,13 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
        if (!(SoftUSART_BitCount))\r
          return;\r
 \r
        if (!(SoftUSART_BitCount))\r
          return;\r
 \r

-       /* Check to see if the current clock state is on the rising or falling edge */\r
-       bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);\r
-\r
-       if (IsSending && !IsRisingEdge)\r
-       {\r
-               if (SoftUSART_Data & 0x01)\r
-                 BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;\r
-               else\r
-                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;                  \r
-\r
-               SoftUSART_Data >>= 1;\r
-               SoftUSART_BitCount--;\r
-       }\r
-       else if (!IsSending && IsRisingEdge)\r
+       /* Check to see if we are at a rising or falling edge of the clock */\r
+       if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r

        {\r
        {\r

+               /* If at rising clock edge and we are in send mode, abort */\r
+               if (IsSending)\r
+                 return;\r
+                 \r

                /* Wait for the start bit when receiving */\r
                if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
                  return;\r
                /* Wait for the start bit when receiving */\r
                if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
                  return;\r


@@ -84,6 +75,20 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
        }\r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
        }\r

+       else\r
+       {\r
+               /* If at falling clock edge and we are in receive mode, abort */\r
+               if (!IsSending)\r
+                 return;\r
+\r
+               if (SoftUSART_Data & 0x01)\r
+                 BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;\r
+               else\r
+                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;                  \r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r

 }\r
 #endif\r
 \r
 }\r
 #endif\r
 \r


@@ -120,7 +125,7 @@ void PDITarget_EnableTargetPDI(void)
        asm volatile ("NOP"::);\r
 \r
        /* Fire timer compare ISR every 100 cycles to manage the software USART */\r
        asm volatile ("NOP"::);\r
 \r
        /* Fire timer compare ISR every 100 cycles to manage the software USART */\r

-       OCR1A   = 100;\r
+       OCR1A   = 80;\r

        TCCR1B  = (1 << WGM12) | (1 << CS10);\r
        TIMSK1  = (1 << OCIE1A);\r
        \r
        TCCR1B  = (1 << WGM12) | (1 << CS10);\r
        TIMSK1  = (1 << OCIE1A);\r
        \r