*/
/*
- Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com)
+ Copyright 2012 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, distribute, and sell this
software and its documentation for any purpose is hereby granted
DDRD |= (1 << 5) | (1 << 3);
DDRD &= ~(1 << 2);
- /* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
+ /* Set up the synchronous USART for TPI communications - 8 data bits, even parity, 2 stop bits */
UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
XPROGTarget_SetRxMode();
/* Wait until a byte has been received before reading */
- while (!(UCSR1A & (1 << RXC1)) && !(TimeoutExpired));
-
- /* Byte of data received - reset the timeout */
- wdt_reset();
+ while (!(UCSR1A & (1 << RXC1)) && TimeoutTicksRemaining);
return UDR1;
}