*/\r
#define PIPE_EPSIZE_MASK 0x7FF\r
\r
- /** Interrupt definition for the pipe IN interrupt (for INTERRUPT type pipes). Should be used with\r
- * the USB_INT_* macros located in USBInterrupt.h.\r
- *\r
- * This interrupt will fire if enabled on an INTERRUPT type pipe if the pipe interrupt period has\r
- * elapsed and the pipe is ready for the next packet from the attached device to be read out from its\r
- * FIFO buffer (if received).\r
- *\r
- * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe\r
- * is selected), and will fire the common pipe interrupt vector.\r
- *\r
- * \see \ref ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
- */\r
- #define PIPE_INT_IN UPIENX, (1 << RXINE) , UPINTX, (1 << RXINI)\r
-\r
- /** Interrupt definition for the pipe OUT interrupt (for INTERRUPT type pipes). Should be used with\r
- * the USB_INT_* macros located in USBInterrupt.h.\r
- *\r
- * This interrupt will fire if enabled on an INTERRUPT type endpoint if a the pipe interrupt period\r
- * has elapsed and the pipe is ready for a packet to be written to the pipe's FIFO buffer and sent\r
- * to the attached device (if required).\r
- * \r
- * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe\r
- * is selected), and will fire the common pipe interrupt vector.\r
- *\r
- * \see \ref ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
- */\r
- #define PIPE_INT_OUT UPIENX, (1 << TXOUTE), UPINTX, (1 << TXOUTI)\r
-\r
- /** Interrupt definition for the pipe SETUP bank ready interrupt (for CONTROL type pipes). Should be\r
- * used with the USB_INT_* macros located in USBInterrupt.h.\r
- *\r
- * This interrupt will fire if enabled on an CONTROL type pipe when the pipe is ready for a new\r
- * control request.\r
- *\r
- * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe\r
- * is selected), and will fire the common pipe interrupt vector.\r
- *\r
- * \see \ref ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
- */\r
- #define PIPE_INT_SETUP UPIENX, (1 << TXSTPE) , UPINTX, (1 << TXSTPI)\r
-\r
- /** Interrupt definition for the pipe error interrupt. Should be used with the USB_INT_* macros\r
- * located in USBInterrupt.h.\r
- *\r
- * This interrupt will fire if enabled on a particular pipe if an error occurs on that pipe, such\r
- * as a CRC mismatch error.\r
- *\r
- * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe\r
- * is selected), and will fire the common pipe interrupt vector.\r
- *\r
- * \see \ref ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
- *\r
- * \see \ref Pipe_GetErrorFlags() for more information on the pipe errors.\r
- */\r
- #define PIPE_INT_ERROR UPIENX, (1 << PERRE), UPINTX, (1 << PERRI)\r
-\r
- /** Interrupt definition for the pipe NAK received interrupt. Should be used with the USB_INT_* macros\r
- * located in USBInterrupt.h.\r
- *\r
- * This interrupt will fire if enabled on a particular pipe if an attached device returns a NAK in\r
- * response to a sent packet.\r
- *\r
- * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe\r
- * is selected), and will fire the common pipe interrupt vector.\r
- *\r
- * \see \ref ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
- *\r
- * \see \ref Pipe_IsNAKReceived() for more information on pipe NAKs.\r
- */\r
- #define PIPE_INT_NAK UPIENX, (1 << NAKEDE), UPINTX, (1 << NAKEDI)\r
-\r
- /** Interrupt definition for the pipe STALL received interrupt. Should be used with the USB_INT_* macros\r
- * located in USBInterrupt.h.\r
- *\r
- * This interrupt will fire if enabled on a particular pipe if an attached device returns a STALL on the\r
- * currently selected pipe. This will also fire if the pipe is an isochronous pipe and a CRC error occurs.\r
- *\r
- * \note This interrupt must be enabled and cleared on *each* pipe which requires it (after the pipe\r
- * is selected), and will fire the common pipe interrupt vector.\r
- *\r
- * \see \ref ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
- */\r
- #define PIPE_INT_STALL UPIENX, (1 << RXSTALLE), UPINTX, (1 << RXSTALLI)\r
-\r
/* Pseudo-Function Macros: */\r
#if defined(__DOXYGEN__)\r
/** Indicates the number of bytes currently stored in the current pipes's selected bank.\r
*/\r
static inline uint8_t Pipe_GetPipeInterrupts(void);\r
\r
- /** Clears the interrupt flag for the specified pipe number.\r
- *\r
- * \param PipeNumber Index of the pipe whose interrupt flag is to be cleared\r
- */\r
- static inline void Pipe_ClearPipeInterrupt(uint8_t PipeNumber);\r
- \r
/** Determines if the specified pipe number has interrupted (valid only for INTERRUPT type\r
* pipes).\r
*\r
\r
#define Pipe_GetPipeInterrupts() UPINT\r
\r
- #define Pipe_ClearPipeInterrupt(n) MACROS{ UPINT &= ~(1 << n); }MACROE\r
-\r
#define Pipe_HasPipeInterrupted(n) ((UPINT & (1 << n)) ? true : false)\r
\r
#define Pipe_Unfreeze() MACROS{ UPCONX &= ~(1 << PFREEZE); }MACROE\r
projects / pub / USBasp.git / blobdiff