this software.\r
*/\r
\r
-#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-#warning PDI Programming Protocol support is incomplete and not currently suitable for use.\r
-\r
/** \file\r
*\r
* PDI Protocol handler, to process V2 Protocol wrapped PDI commands used in Atmel programmer devices.\r
#define INCLUDE_FROM_PDIPROTOCOL_C\r
#include "PDIProtocol.h"\r
\r
+#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
+/** Base absolute address for the target's NVM controller */\r
uint32_t XPROG_Param_NVMBase;\r
+\r
+/** Size in bytes of the target's EEPROM page */\r
uint32_t XPROG_Param_EEPageSize;\r
\r
/** Handler for the CMD_XPROG_SETMODE command, which sets the programmer-to-target protocol used for PDI\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
Endpoint_Write_Byte(CMD_XPROG_SETMODE);\r
- Endpoint_Write_Byte(SetMode_XPROG_Params.Protocol ? STATUS_CMD_FAILED : STATUS_CMD_OK);\r
+ Endpoint_Write_Byte((SetMode_XPROG_Params.Protocol == XPRG_PROTOCOL_PDI) ? STATUS_CMD_OK : STATUS_CMD_FAILED);\r
Endpoint_ClearIN(); \r
}\r
\r
/** Handler for the XPROG ENTER_PROGMODE command to establish a PDI connection with the attached device. */\r
static void PDIProtocol_EnterXPROGMode(void)\r
{\r
- uint8_t ReturnStatus = XPRG_ERR_OK;\r
-\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
- PDIDATA_LINE_DDR |= PDIDATA_LINE_MASK;\r
- PDICLOCK_LINE_DDR |= PDICLOCK_LINE_MASK;\r
- \r
- /* Must hold DATA line high for at least 90nS to enable PDI interface */\r
- PDIDATA_LINE_PORT |= PDIDATA_LINE_MASK;\r
- asm volatile ("NOP"::);\r
- #if (F_CPU > 8000000)\r
- asm volatile ("NOP"::);\r
- #endif\r
- \r
- /* Toggle CLOCK line 16 times within 100uS of the original 90nS timeout to keep PDI interface enabled */\r
- for (uint8_t i = 0; i < 16; i++)\r
- TOGGLE_PDI_CLOCK;\r
+ /* Enable PDI programming mode with the attached target */\r
+ PDITarget_EnableTargetPDI();\r
\r
+ /* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */\r
+ PDITarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG); \r
+ PDITarget_SendByte(PDI_RESET_KEY);\r
+\r
/* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */\r
PDITarget_SendByte(PDI_CMD_KEY); \r
- for (uint8_t i = 0; i < 8; i++)\r
- PDITarget_SendByte(PDI_NVMENABLE_KEY[i]);\r
+ for (uint8_t i = sizeof(PDI_NVMENABLE_KEY); i > 0; i--)\r
+ PDITarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);\r
\r
- /* Read out the STATUS register to check that NVM access was successfully enabled */\r
- PDITarget_SendByte(PDI_CMD_LDCS | PD_STATUS_REG); \r
- if (!(PDITarget_ReceiveByte() & PDI_STATUS_NVM))\r
- ReturnStatus = XPRG_ERR_FAILED;\r
+ /* Wait until the NVM bus becomes active */\r
+ bool NVMBusEnabled = PDITarget_WaitWhileNVMBusBusy();\r
\r
Endpoint_Write_Byte(CMD_XPROG);\r
Endpoint_Write_Byte(XPRG_CMD_ENTER_PROGMODE);\r
- Endpoint_Write_Byte(ReturnStatus);\r
+ Endpoint_Write_Byte(NVMBusEnabled ? XPRG_ERR_OK : XPRG_ERR_FAILED);\r
Endpoint_ClearIN();\r
}\r
\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
- /* Set DATA and CLOCK lines to inputs */\r
- PDIDATA_LINE_DDR &= ~PDIDATA_LINE_MASK;\r
- PDICLOCK_LINE_DDR &= ~PDICLOCK_LINE_MASK;\r
- \r
- /* Tristate DATA and CLOCK lines */\r
- PDIDATA_LINE_PORT &= ~PDIDATA_LINE_MASK;\r
- PDICLOCK_LINE_PORT &= ~PDICLOCK_LINE_MASK;\r
- \r
+ /* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */\r
+ PDITarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG); \r
+ PDITarget_SendByte(0x00);\r
+\r
+ PDITarget_DisableTargetPDI();\r
+\r
Endpoint_Write_Byte(CMD_XPROG);\r
Endpoint_Write_Byte(XPRG_CMD_LEAVE_PROGMODE);\r
Endpoint_Write_Byte(XPRG_ERR_OK);\r
} Erase_XPROG_Params;\r
\r
Endpoint_Read_Stream_LE(&Erase_XPROG_Params, sizeof(Erase_XPROG_Params));\r
+ Erase_XPROG_Params.Address = SwapEndian_32(Erase_XPROG_Params.Address);\r
\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
- // TODO: Send erase command here via PDI protocol\r
+ uint8_t EraseCommand = NVM_CMD_NOOP;\r
+ \r
+ /* Determine which NVM command to send to the device depending on the memory to erase */\r
+ if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_CHIP)\r
+ EraseCommand = NVM_CMD_CHIPERASE;\r
+ else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP)\r
+ EraseCommand = NVM_CMD_ERASEAPPSEC;\r
+ else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_BOOT)\r
+ EraseCommand = NVM_CMD_ERASEBOOTSEC;\r
+ else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_EEPROM)\r
+ EraseCommand = NVM_CMD_ERASEEEPROM;\r
+ else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP_PAGE)\r
+ EraseCommand = NVM_CMD_ERASEAPPSECPAGE;\r
+ else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_BOOT_PAGE)\r
+ EraseCommand = NVM_CMD_ERASEBOOTSECPAGE;\r
+ else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_EEPROM_PAGE)\r
+ EraseCommand = NVM_CMD_ERASEEEPROMPAGE;\r
+ else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_USERSIG)\r
+ EraseCommand = NVM_CMD_ERASEUSERSIG;\r
+ \r
+ /* Erase the target memory, indicate timeout if ocurred */\r
+ if (!(NVMTarget_EraseMemory(EraseCommand, Erase_XPROG_Params.Address)))\r
+ ReturnStatus = XPRG_ERR_TIMEOUT;\r
\r
Endpoint_Write_Byte(CMD_XPROG);\r
Endpoint_Write_Byte(XPRG_CMD_ERASE);\r
struct\r
{\r
uint8_t MemoryType;\r
+ uint8_t PageMode;\r
uint32_t Address;\r
uint16_t Length;\r
uint8_t ProgData[256];\r
\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+ /* Assume FLASH page programming by default, as it is the common case */\r
+ uint8_t WriteCommand = NVM_CMD_WRITEFLASHPAGE;\r
+ uint8_t WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;\r
+ uint8_t EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;\r
+ bool PagedMemory = true;\r
+ \r
+ if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_APPL)\r
+ {\r
+ WriteCommand = NVM_CMD_WRITEAPPSECPAGE;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_BOOT)\r
+ {\r
+ WriteCommand = NVM_CMD_WRITEBOOTSECPAGE;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_EEPROM)\r
+ {\r
+ WriteCommand = NVM_CMD_WRITEEEPROMPAGE;\r
+ WriteBuffCommand = NVM_CMD_LOADEEPROMPAGEBUFF;\r
+ EraseBuffCommand = NVM_CMD_ERASEEEPROMPAGEBUFF;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)\r
+ {\r
+ /* User signature is paged, but needs us to manually indicate the mode bits since the host doesn't set them */\r
+ WriteMemory_XPROG_Params.PageMode = (XPRG_PAGEMODE_ERASE | XPRG_PAGEMODE_WRITE);\r
+ WriteCommand = NVM_CMD_WRITEUSERSIG;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_FUSE)\r
+ {\r
+ WriteCommand = NVM_CMD_WRITEFUSE;\r
+ PagedMemory = false;\r
+ }\r
+ else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_LOCKBITS)\r
+ {\r
+ WriteCommand = NVM_CMD_WRITELOCK;\r
+ PagedMemory = false;\r
+ }\r
\r
- // TODO: Send program command here via PDI protocol\r
+ /* Send the appropriate memory write commands to the device, indicate timeout if occurred */\r
+ if ((PagedMemory && !NVMTarget_WritePageMemory(WriteBuffCommand, EraseBuffCommand, WriteCommand, \r
+ WriteMemory_XPROG_Params.PageMode, WriteMemory_XPROG_Params.Address,\r
+ WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length)) ||\r
+ (!PagedMemory && !NVMTarget_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address,\r
+ WriteMemory_XPROG_Params.ProgData)))\r
+ {\r
+ ReturnStatus = XPRG_ERR_TIMEOUT;\r
+ }\r
\r
Endpoint_Write_Byte(CMD_XPROG);\r
- Endpoint_Write_Byte(XPRG_CMD_READ_MEM);\r
+ Endpoint_Write_Byte(XPRG_CMD_WRITE_MEM);\r
Endpoint_Write_Byte(ReturnStatus); \r
Endpoint_ClearIN();\r
}\r
\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
+\r
+ uint8_t ReadBuffer[256];\r
\r
- // TODO: Send read command here via PDI protocol\r
- \r
+ /* Read the target's memory, indicate timeout if occurred */\r
+ if (!(NVMTarget_ReadMemory(ReadMemory_XPROG_Params.Address, ReadBuffer, ReadMemory_XPROG_Params.Length)))\r
+ ReturnStatus = XPRG_ERR_TIMEOUT;\r
+\r
Endpoint_Write_Byte(CMD_XPROG);\r
Endpoint_Write_Byte(XPRG_CMD_READ_MEM);\r
Endpoint_Write_Byte(ReturnStatus);\r
\r
+ if (ReturnStatus == XPRG_ERR_OK)\r
+ Endpoint_Write_Stream_LE(ReadBuffer, ReadMemory_XPROG_Params.Length);\r
+ \r
Endpoint_ClearIN();\r
}\r
\r
static void PDIProtocol_ReadCRC(void)\r
{\r
uint8_t ReturnStatus = XPRG_ERR_OK;\r
-\r
- uint8_t CRCType = Endpoint_Read_Byte();\r
\r
+ struct\r
+ {\r
+ uint8_t CRCType;\r
+ } ReadCRC_XPROG_Params;\r
+ \r
+ Endpoint_Read_Stream_LE(&ReadCRC_XPROG_Params, sizeof(ReadCRC_XPROG_Params));\r
Endpoint_ClearOUT();\r
Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);\r
\r
- uint32_t MemoryCRC = 0;\r
+ uint8_t CRCCommand = NVM_CMD_NOOP;\r
+ uint32_t MemoryCRC;\r
+\r
+ /* Determine which NVM command to send to the device depending on the memory to CRC */\r
+ if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_APP)\r
+ CRCCommand = NVM_CMD_APPCRC;\r
+ else if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_BOOT)\r
+ CRCCommand = NVM_CMD_BOOTCRC;\r
+ else\r
+ CRCCommand = NVM_CMD_FLASHCRC;\r
\r
- // TODO: Read device CRC for desired memory via PDI protocol\r
+ /* Perform and retrieve the memory CRC, indicate timeout if occurred */\r
+ if (!(NVMTarget_GetMemoryCRC(CRCCommand, &MemoryCRC)))\r
+ ReturnStatus = XPRG_ERR_TIMEOUT;\r
\r
Endpoint_Write_Byte(CMD_XPROG);\r
Endpoint_Write_Byte(XPRG_CMD_CRC);\r
\r
uint8_t XPROGParam = Endpoint_Read_Byte();\r
\r
+ /* Determine which parameter is being set, store the new parameter value */\r
if (XPROGParam == XPRG_PARAM_NVMBASE)\r
- XPROG_Param_NVMBase = Endpoint_Read_DWord_LE();\r
+ XPROG_Param_NVMBase = Endpoint_Read_DWord_BE();\r
else if (XPROGParam == XPRG_PARAM_EEPPAGESIZE)\r
- XPROG_Param_EEPageSize = Endpoint_Read_Word_LE();\r
+ XPROG_Param_EEPageSize = Endpoint_Read_Word_BE();\r
else\r
ReturnStatus = XPRG_ERR_FAILED;\r
\r
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