- OCR1B = TCNT1 + 1; // force first compare
- TCCR1B = (1 << CS10); // CLK/1, T1 mode 0
- TCCR1C = (1 << FOC1B);
- TIMSK1 = (1 << OCIE1B); // enable tx and wait for start
- EICRA = (1 << ISC01); // -ve edge
- EIMSK = (1 << INT0); // enable INT0 interrupt
-
- STXPORT |= (1 << STX); // TX output
- STXDDR |= (1 << STX); // TX output
- SRXPORT |= (1 << SRX); // pullup on INT0
+ /* Set TX pin to output high, enable RX pull-up */
+ STXPORT |= (1 << STX);
+ STXDDR |= (1 << STX);
+ SRXPORT |= (1 << SRX);
+
+ /* Enable INT0 for the detection of incoming start bits that signal the start of a byte */
+ EICRA = (1 << ISC01);
+ EIMSK = (1 << INT0);
+
+ /* Set the transmission and reception timer compare values for the default baud rate */
+ SoftUART_SetBaud(9600);
+
+ /* Setup reception timer compare ISR */
+ TIMSK1 = (1 << OCIE1A);
+
+ /* Setup transmission timer compare ISR and start the timer */
+ TIMSK3 = (1 << OCIE3A);
+ TCCR3B = ((1 << CS30) | (1 << WGM32));