Projects/AVRISP/Lib/PDITarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  32
  33 /** \file
  34  *
  35  *  Target-related functions for the PDI Protocol decoder.
  36  */
  37
  38 #define  INCLUDE_FROM_PDITARGET_C
  39 #include "PDITarget.h"
  40
  41 volatile bool     IsSending;
  42
  43 #if !defined(PDI_VIA_HARDWARE_USART)
  44 volatile uint16_t DataBits;
  45 volatile uint8_t  BitCount;
  46
  47 ISR(TIMER0_COMPA_vect, ISR_BLOCK)
  48 {
  49         BITBANG_PDICLOCK_PORT ^= BITBANG_PDICLOCK_MASK;
  50
  51         /* If not sending or receiving, just exit */
  52         if (!(BitCount))
  53           return;
  54
  55         /* Check to see if the current clock state is on the rising or falling edge */
  56         bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);
  57
  58         if (IsSending && !IsRisingEdge)
  59         {
  60                 if (DataBits & 0x01)
  61                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  62                 else
  63                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  64
  65                 DataBits >>= 1;
  66                 BitCount--;
  67         }
  68         else if (!IsSending && IsRisingEdge)
  69         {
  70                 /* Wait for the start bit when receiving */
  71                 if ((BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK))
  72                   return;
  73
  74                 if (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK)
  75                   DataBits |= (1 << (BITS_IN_FRAME - 1));
  76
  77                 DataBits >>= 1;
  78                 BitCount--;
  79         }
  80 }
  81
  82 void PDITarget_EnableTargetPDI(void)
  83 {
  84         /* Set DATA and CLOCK lines to outputs */
  85         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
  86         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
  87
  88         /* Set DATA line high for 90ns to disable /RESET functionality */
  89         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
  90         asm volatile ("NOP"::);
  91         asm volatile ("NOP"::);
  92
  93         /* Fire timer compare ISR every 160 cycles */
  94         OCR0A   = 20;
  95         TCCR0A  = (1 << WGM01);
  96         TCCR0B  = (1 << CS01);
  97         TIMSK0  = (1 << OCIE0A);
  98 }
  99
 100 void PDITarget_DisableTargetPDI(void)
 101 {
 102         /* Set DATA and CLOCK lines to inputs */
 103         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 104         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 105
 106         /* Tristate DATA and CLOCK lines */
 107         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 108         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 109
 110         TCCR0B  = 0;
 111 }
 112
 113 void PDITarget_SendByte(uint8_t Byte)
 114 {
 115         bool IsOddBitsSet = false;
 116
 117         /* Compute Even parity bit */
 118         for (uint8_t i = 0; i < 8; i++)
 119         {
 120                 if (Byte & (1 << i))
 121                   IsOddBitsSet = !(IsOddBitsSet);
 122         }
 123
 124         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 125         DataBits  = ((uint16_t)IsOddBitsSet << 10) | ((uint16_t)Byte << 1) | (1 << 0);
 126
 127         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 128         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 129
 130         IsSending = true;
 131         BitCount  = BITS_IN_FRAME;
 132         while (BitCount);
 133
 134         BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 135         BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 136 }
 137
 138 uint8_t PDITarget_ReceiveByte(void)
 139 {
 140         IsSending = false;
 141         BitCount  = BITS_IN_FRAME;
 142         while (BitCount);
 143
 144         return (DataBits >> 1);
 145 }
 146
 147 void PDITarget_SendBreak(void)
 148 {
 149         DataBits  = 0;
 150
 151         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 152         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 153
 154         IsSending = true;
 155         BitCount  = BITS_IN_FRAME;
 156         while (BitCount);
 157
 158         BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 159         BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 160 }
 161 #else
 162 void PDITarget_EnableTargetPDI(void)
 163 {
 164         /* Set Tx and XCK as outputs, Rx as input */
 165         DDRD |=  (1 << 5) | (1 << 3);
 166         DDRD &= ~(1 << 2);
 167
 168         /* Set DATA line high for 90ns to disable /RESET functionality */
 169         PORTD |= (1 << 3);
 170         asm volatile ("NOP"::);
 171         asm volatile ("NOP"::);
 172
 173         /* Set up the synchronous USART for XMEGA communications -
 174            8 data bits, even parity, 2 stop bits */
 175         UBRR1  = 10;
 176         UCSR1B = (1 << TXEN1);
 177         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 178
 179         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 180         PDITarget_SendBreak();
 181         PDITarget_SendBreak();
 182 }
 183
 184 void PDITarget_DisableTargetPDI(void)
 185 {
 186         /* Turn off receiver and transmitter of the USART, clear settings */
 187         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 188         UCSR1B  = 0;
 189         UCSR1C  = 0;
 190
 191         /* Set all USART lines as input, tristate */
 192         DDRD  &= ~((1 << 5) | (1 << 3));
 193         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 194 }
 195
 196 void PDITarget_SendByte(uint8_t Byte)
 197 {
 198         /* Switch to Tx mode if currently in Rx mode */
 199         if (!(IsSending))
 200         {
 201                 PORTD  |=  (1 << 3);
 202                 DDRD   |=  (1 << 3);
 203
 204                 UCSR1B &= ~(1 << RXEN1);
 205                 UCSR1B |=  (1 << TXEN1);
 206
 207                 IsSending = true;
 208         }
 209
 210         /* Wait until there is space in the hardware Tx buffer before writing */
 211         while (!(UCSR1A & (1 << UDRE1)));
 212         UDR1 = Byte;
 213 }
 214
 215 uint8_t PDITarget_ReceiveByte(void)
 216 {
 217         /* Switch to Rx mode if currently in Tx mode */
 218         if (IsSending)
 219         {
 220                 while (!(UCSR1A & (1 << TXC1)));
 221                 UCSR1A |=  (1 << TXC1);
 222
 223                 UCSR1B &= ~(1 << TXEN1);
 224                 UCSR1B |=  (1 << RXEN1);
 225
 226                 DDRD   &= ~(1 << 3);
 227                 PORTD  &= ~(1 << 3);
 228
 229                 IsSending = false;
 230         }
 231
 232         /* Wait until a byte has been received before reading */
 233         while (!(UCSR1A & (1 << RXC1)));
 234         return UDR1;
 235 }
 236
 237 void PDITarget_SendBreak(void)
 238 {
 239         /* Switch to Tx mode if currently in Rx mode */
 240         if (!(IsSending))
 241         {
 242                 PORTD  |=  (1 << 3);
 243                 DDRD   |=  (1 << 3);
 244
 245                 UCSR1B &= ~(1 << RXEN1);
 246                 UCSR1B |=  (1 << TXEN1);
 247
 248                 IsSending = true;
 249         }
 250
 251         /* Need to do nothing for a full frame to send a BREAK */
 252         for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)
 253         {
 254                 /* Wait for rising edge of clock */
 255                 while (PIND & (1 << 5));
 256
 257                 /* Wait for falling edge of clock */
 258                 while (!(PIND & (1 << 5)));
 259         }
 260 }
 261 #endif
 262
 263 #endif