Projects/AVRISP/Lib/PDITarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  32
  33 /** \file
  34  *
  35  *  Target-related functions for the PDI Protocol decoder.
  36  */
  37
  38 #define  INCLUDE_FROM_PDITARGET_C
  39 #include "PDITarget.h"
  40
  41 #if !defined(PDI_VIA_HARDWARE_USART)
  42 volatile bool     IsSending;
  43 volatile uint16_t DataBits;
  44 volatile uint8_t  BitCount;
  45
  46 ISR(TIMER0_COMPA_vect, ISR_BLOCK)
  47 {
  48         BITBANG_PDICLOCK_PORT ^= BITBANG_PDICLOCK_MASK;
  49
  50         /* If not sending or receiving, just exit */
  51         if (!(BitCount))
  52           return;
  53
  54         /* Check to see if the current clock state is on the rising or falling edge */
  55         bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);
  56
  57         if (IsSending && !IsRisingEdge)
  58         {
  59                 if (DataBits & 0x01)
  60                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  61                 else
  62                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  63
  64                 DataBits >>= 1;
  65                 BitCount--;
  66         }
  67         else if (!IsSending && IsRisingEdge)
  68         {
  69                 /* Wait for the start bit when receiving */
  70                 if ((BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK))
  71                   return;
  72
  73                 if (BITBANG_PDIDATA_PORT & BITBANG_PDIDATA_MASK)
  74                   DataBits |= (1 << (BITS_IN_FRAME - 1));
  75
  76                 DataBits >>= 1;
  77                 BitCount--;
  78         }
  79 }
  80
  81 void PDITarget_EnableTargetPDI(void)
  82 {
  83         /* Set DATA and CLOCK lines to outputs */
  84         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
  85         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
  86
  87         /* Set DATA line high for 90ns to disable /RESET functionality */
  88         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
  89         asm volatile ("NOP"::);
  90         asm volatile ("NOP"::);
  91
  92         /* Fire timer compare ISR every 160 cycles */
  93         OCR0A   = 20;
  94         TCCR0A  = (1 << WGM01);
  95         TCCR0B  = (1 << CS01);
  96         TIMSK0  = (1 << OCIE0A);
  97 }
  98
  99 void PDITarget_DisableTargetPDI(void)
 100 {
 101         /* Set DATA and CLOCK lines to inputs */
 102         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 103         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 104
 105         /* Tristate DATA and CLOCK lines */
 106         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 107         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 108
 109         TCCR0B  = 0;
 110 }
 111
 112 void PDITarget_SendByte(uint8_t Byte)
 113 {
 114         bool IsOddBitsSet = false;
 115
 116         /* Compute Even parity bit */
 117         for (uint8_t i = 0; i < 8; i++)
 118         {
 119                 if (Byte & (1 << i))
 120                   IsOddBitsSet = !(IsOddBitsSet);
 121         }
 122
 123         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 124         DataBits  = ((uint16_t)IsOddBitsSet << 10) | ((uint16_t)Byte << 1) | (1 << 0);
 125
 126         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 127         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 128
 129         IsSending = true;
 130         BitCount  = BITS_IN_FRAME;
 131         while (BitCount);
 132
 133         BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 134         BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 135 }
 136
 137 uint8_t PDITarget_ReceiveByte(void)
 138 {
 139         IsSending = false;
 140         BitCount  = BITS_IN_FRAME;
 141         while (BitCount);
 142
 143         return (DataBits >> 1);
 144 }
 145
 146 void PDITarget_SendBreak(void)
 147 {
 148         DataBits  = 0;
 149
 150         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 151         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 152
 153         IsSending = true;
 154         BitCount  = BITS_IN_FRAME;
 155         while (BitCount);
 156
 157         BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 158         BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 159 }
 160 #else
 161 void PDITarget_EnableTargetPDI(void)
 162 {
 163         /* Set Tx and XCK as outputs, Rx as input */
 164         DDRD |=  (1 << 5) | (1 << 3);
 165         DDRD &= ~(1 << 2);
 166
 167         /* Set DATA line high for 90ns to disable /RESET functionality */
 168         PORTD |= (1 << 3);
 169         asm volatile ("NOP"::);
 170         asm volatile ("NOP"::);
 171
 172         /* Set up the synchronous USART for XMEGA communications -
 173            8 data bits, even parity, 2 stop bits */
 174         UBRR1  = 10;
 175         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 176
 177         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 178         PDITarget_SendBreak();
 179         PDITarget_SendBreak();
 180 }
 181
 182 void PDITarget_DisableTargetPDI(void)
 183 {
 184         /* Turn of receiver and transmitter of the USART, clear settings */
 185         UCSR1B = 0;
 186         UCSR1C = 0;
 187
 188         /* Set all USART lines as input, tristate */
 189         DDRD  &= ~((1 << 5) | (1 << 3));
 190         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 191 }
 192
 193 void PDITarget_SendByte(uint8_t Byte)
 194 {
 195         UCSR1B &= ~(1 << RXEN1);
 196         UCSR1B |=  (1 << TXEN1);
 197
 198         UDR1 = Byte;
 199
 200         while (!(UCSR1A & (1 << TXC1)));
 201         UCSR1A |=  (1 << TXC1);
 202 }
 203
 204 uint8_t PDITarget_ReceiveByte(void)
 205 {
 206         UCSR1B &= ~(1 << TXEN1);
 207         UCSR1B |=  (1 << RXEN1);
 208
 209         while (!(UCSR1A & (1 << RXC1)));
 210         UCSR1A |=  (1 << RXC1);
 211
 212         return UDR1;
 213 }
 214
 215 void PDITarget_SendBreak(void)
 216 {
 217         UCSR1B &= ~(1 << RXEN1);
 218         UCSR1B |=  (1 << TXEN1);
 219
 220         for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)
 221         {
 222                 /* Wait for rising edge of clock */
 223                 while (PIND & (1 << 5));
 224
 225                 /* Wait for falling edge of clock */
 226                 while (!(PIND & (1 << 5)));
 227         }
 228 }
 229 #endif
 230
 231 #endif