3 Copyright (C) Dean Camera, 2010.
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
33 * Target-related functions for the PDI Protocol decoder.
36 #define INCLUDE_FROM_XPROGTARGET_C
37 #include "XPROGTarget.h"
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
42 volatile bool IsSending
;
44 #if !defined(XPROG_VIA_HARDWARE_USART)
45 /** Software USART raw frame bits for transmission/reception. */
46 volatile uint16_t SoftUSART_Data
;
48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
49 #define SoftUSART_BitCount GPIOR2
52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
53 ISR(TIMER1_COMPA_vect
, ISR_BLOCK
)
55 /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
56 BITBANG_PDICLOCK_PIN
|= BITBANG_PDICLOCK_MASK
;
58 /* If not sending or receiving, just exit */
59 if (!(SoftUSART_BitCount
))
62 if (BITBANG_PDICLOCK_PORT
& BITBANG_PDICLOCK_MASK
)
64 /* If at rising clock edge and we are in send mode, abort */
68 /* Wait for the start bit when receiving */
69 if ((SoftUSART_BitCount
== BITS_IN_USART_FRAME
) && (BITBANG_PDIDATA_PIN
& BITBANG_PDIDATA_MASK
))
72 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
73 * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
74 if (BITBANG_PDIDATA_PIN
& BITBANG_PDIDATA_MASK
)
75 ((uint8_t*)&SoftUSART_Data
)[1] |= (1 << (BITS_IN_USART_FRAME
- 9));
82 /* If not sending or receiving, just exit */
83 if (!(SoftUSART_BitCount
))
86 /* If at falling clock edge and we are in receive mode, abort */
90 /* Set the data line to the next bit value */
91 if (((uint8_t*)&SoftUSART_Data
)[0] & 0x01)
92 BITBANG_PDIDATA_PORT
|= BITBANG_PDIDATA_MASK
;
94 BITBANG_PDIDATA_PORT
&= ~BITBANG_PDIDATA_MASK
;
101 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
102 ISR(TIMER1_CAPT_vect
, ISR_BLOCK
)
104 /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
105 BITBANG_TPICLOCK_PIN
|= BITBANG_TPICLOCK_MASK
;
107 /* If not sending or receiving, just exit */
108 if (!(SoftUSART_BitCount
))
111 /* Check to see if we are at a rising or falling edge of the clock */
112 if (BITBANG_TPICLOCK_PORT
& BITBANG_TPICLOCK_MASK
)
114 /* If at rising clock edge and we are in send mode, abort */
118 /* Wait for the start bit when receiving */
119 if ((SoftUSART_BitCount
== BITS_IN_USART_FRAME
) && (BITBANG_TPIDATA_PIN
& BITBANG_TPIDATA_MASK
))
122 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
123 * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */
124 if (BITBANG_TPIDATA_PIN
& BITBANG_TPIDATA_MASK
)
125 ((uint8_t*)&SoftUSART_Data
)[1] |= (1 << (BITS_IN_USART_FRAME
- 9));
127 SoftUSART_Data
>>= 1;
128 SoftUSART_BitCount
--;
132 /* If at falling clock edge and we are in receive mode, abort */
136 /* Set the data line to the next bit value */
137 if (((uint8_t*)&SoftUSART_Data
)[0] & 0x01)
138 BITBANG_TPIDATA_PORT
|= BITBANG_TPIDATA_MASK
;
140 BITBANG_TPIDATA_PORT
&= ~BITBANG_TPIDATA_MASK
;
142 SoftUSART_Data
>>= 1;
143 SoftUSART_BitCount
--;
148 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
149 void XPROGTarget_EnableTargetPDI(void)
153 #if defined(XPROG_VIA_HARDWARE_USART)
154 /* Set Tx and XCK as outputs, Rx as input */
155 DDRD
|= (1 << 5) | (1 << 3);
158 /* Set DATA line high for at least 90ns to disable /RESET functionality */
162 /* Set up the synchronous USART for XMEGA communications -
163 8 data bits, even parity, 2 stop bits */
164 UBRR1
= (F_CPU
/ 500000UL);
165 UCSR1B
= (1 << TXEN1
);
166 UCSR1C
= (1 << UMSEL10
) | (1 << UPM11
) | (1 << USBS1
) | (1 << UCSZ11
) | (1 << UCSZ10
) | (1 << UCPOL1
);
168 /* Set DATA and CLOCK lines to outputs */
169 BITBANG_PDIDATA_DDR
|= BITBANG_PDIDATA_MASK
;
170 BITBANG_PDICLOCK_DDR
|= BITBANG_PDICLOCK_MASK
;
172 /* Set DATA line high for at least 90ns to disable /RESET functionality */
173 BITBANG_PDIDATA_PORT
|= BITBANG_PDIDATA_MASK
;
176 /* Fire timer compare channel A ISR to manage the software USART */
177 OCR1A
= BITS_BETWEEN_USART_CLOCKS
;
178 OCR1B
= BITS_BETWEEN_USART_CLOCKS
;
179 TCCR1B
= (1 << WGM12
) | (1 << CS10
);
180 TIMSK1
= (1 << OCIE1A
);
183 /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
184 XPROGTarget_SendBreak();
185 XPROGTarget_SendBreak();
188 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
189 void XPROGTarget_EnableTargetTPI(void)
193 /* Set /RESET line low for at least 400ns to enable TPI functionality */
194 AUX_LINE_DDR
|= AUX_LINE_MASK
;
195 AUX_LINE_PORT
&= ~AUX_LINE_MASK
;
198 #if defined(XPROG_VIA_HARDWARE_USART)
199 /* Set Tx and XCK as outputs, Rx as input */
200 DDRD
|= (1 << 5) | (1 << 3);
203 /* Set up the synchronous USART for TINY communications -
204 8 data bits, even parity, 2 stop bits */
205 UBRR1
= (F_CPU
/ 500000UL);
206 UCSR1B
= (1 << TXEN1
);
207 UCSR1C
= (1 << UMSEL10
) | (1 << UPM11
) | (1 << USBS1
) | (1 << UCSZ11
) | (1 << UCSZ10
) | (1 << UCPOL1
);
209 /* Set DATA and CLOCK lines to outputs */
210 BITBANG_TPIDATA_DDR
|= BITBANG_TPIDATA_MASK
;
211 BITBANG_TPICLOCK_DDR
|= BITBANG_TPICLOCK_MASK
;
213 /* Set DATA line high for idle state */
214 BITBANG_TPIDATA_PORT
|= BITBANG_TPIDATA_MASK
;
216 /* Fire timer capture channel ISR to manage the software USART */
217 ICR1
= BITS_BETWEEN_USART_CLOCKS
;
218 TCCR1B
= (1 << WGM13
) | (1 << WGM12
) | (1 << CS10
);
219 TIMSK1
= (1 << ICIE1
);
222 /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
223 XPROGTarget_SendBreak();
224 XPROGTarget_SendBreak();
227 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
228 void XPROGTarget_DisableTargetPDI(void)
230 /* Switch to Rx mode to ensure that all pending transmissions are complete */
231 XPROGTarget_SetRxMode();
233 #if defined(XPROG_VIA_HARDWARE_USART)
234 /* Set /RESET high for a one millisecond to ensure target device is restarted */
238 /* Turn off receiver and transmitter of the USART, clear settings */
239 UCSR1A
|= (1 << TXC1
) | (1 << RXC1
);
243 /* Set all USART lines as input, tristate */
244 DDRD
&= ~((1 << 5) | (1 << 3));
245 PORTD
&= ~((1 << 5) | (1 << 3) | (1 << 2));
247 /* Turn off software USART management timer */
250 /* Set /RESET high for a one millisecond to ensure target device is restarted */
251 BITBANG_PDICLOCK_PORT
|= BITBANG_PDICLOCK_MASK
;
254 /* Set DATA and CLOCK lines to inputs */
255 BITBANG_PDIDATA_DDR
&= ~BITBANG_PDIDATA_MASK
;
256 BITBANG_PDICLOCK_DDR
&= ~BITBANG_PDICLOCK_MASK
;
258 /* Tristate DATA and CLOCK lines */
259 BITBANG_PDIDATA_PORT
&= ~BITBANG_PDIDATA_MASK
;
260 BITBANG_PDICLOCK_PORT
&= ~BITBANG_PDICLOCK_MASK
;
264 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
265 void XPROGTarget_DisableTargetTPI(void)
267 /* Switch to Rx mode to ensure that all pending transmissions are complete */
268 XPROGTarget_SetRxMode();
270 #if defined(XPROG_VIA_HARDWARE_USART)
271 /* Turn off receiver and transmitter of the USART, clear settings */
272 UCSR1A
|= (1 << TXC1
) | (1 << RXC1
);
276 /* Set all USART lines as input, tristate */
277 DDRD
&= ~((1 << 5) | (1 << 3));
278 PORTD
&= ~((1 << 5) | (1 << 3) | (1 << 2));
280 /* Turn off software USART management timer */
283 /* Set DATA and CLOCK lines to inputs */
284 BITBANG_TPIDATA_DDR
&= ~BITBANG_TPIDATA_MASK
;
285 BITBANG_TPICLOCK_DDR
&= ~BITBANG_TPICLOCK_MASK
;
287 /* Tristate DATA and CLOCK lines */
288 BITBANG_TPIDATA_PORT
&= ~BITBANG_TPIDATA_MASK
;
289 BITBANG_TPICLOCK_PORT
&= ~BITBANG_TPICLOCK_MASK
;
292 /* Tristate target /RESET line */
293 AUX_LINE_DDR
&= ~AUX_LINE_MASK
;
294 AUX_LINE_PORT
&= ~AUX_LINE_MASK
;
297 /** Sends a byte via the USART.
299 * \param[in] Byte Byte to send through the USART
301 void XPROGTarget_SendByte(const uint8_t Byte
)
303 /* Switch to Tx mode if currently in Rx mode */
305 XPROGTarget_SetTxMode();
307 #if defined(XPROG_VIA_HARDWARE_USART)
308 /* Wait until there is space in the hardware Tx buffer before writing */
309 while (!(UCSR1A
& (1 << UDRE1
)));
310 UCSR1A
|= (1 << TXC1
);
313 /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
314 uint16_t NewUSARTData
= ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte
<< 1) | (0 << 0));
316 /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
317 uint8_t ParityData
= Byte
;
320 NewUSARTData
^= (1 << 9);
321 ParityData
&= (ParityData
- 1);
324 /* Wait until transmitter is idle before writing new data */
325 while (SoftUSART_BitCount
);
327 /* Data shifted out LSB first, START DATA PARITY STOP STOP */
328 SoftUSART_Data
= NewUSARTData
;
329 SoftUSART_BitCount
= BITS_IN_USART_FRAME
;
333 /** Receives a byte via the software USART, blocking until data is received.
335 * \return Received byte from the USART
337 uint8_t XPROGTarget_ReceiveByte(void)
339 /* Switch to Rx mode if currently in Tx mode */
341 XPROGTarget_SetRxMode();
343 #if defined(XPROG_VIA_HARDWARE_USART)
344 /* Wait until a byte has been received before reading */
345 while (!(UCSR1A
& (1 << RXC1
)) && TimeoutMSRemaining
)
347 /* Manage software timeout */
348 if (TIFR0
& (1 << OCF0A
))
350 TIFR0
|= (1 << OCF0A
);
351 TimeoutMSRemaining
--;
357 /* Wait until a byte has been received before reading */
358 SoftUSART_BitCount
= BITS_IN_USART_FRAME
;
359 while (SoftUSART_BitCount
&& TimeoutMSRemaining
)
361 /* Manage software timeout */
362 if (TIFR0
& (1 << OCF0A
))
364 TIFR0
|= (1 << OCF0A
);
365 TimeoutMSRemaining
--;
369 if (TimeoutMSRemaining
)
370 TimeoutMSRemaining
= COMMAND_TIMEOUT_MS
;
372 /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
373 return (uint8_t)SoftUSART_Data
;
377 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
378 void XPROGTarget_SendBreak(void)
380 /* Switch to Tx mode if currently in Rx mode */
382 XPROGTarget_SetTxMode();
384 #if defined(XPROG_VIA_HARDWARE_USART)
385 /* Need to do nothing for a full frame to send a BREAK */
386 for (uint8_t i
= 0; i
< BITS_IN_USART_FRAME
; i
++)
388 /* Wait for a full cycle of the clock */
389 while (PIND
& (1 << 5));
390 while (!(PIND
& (1 << 5)));
393 while (SoftUSART_BitCount
);
395 /* Need to do nothing for a full frame to send a BREAK */
396 SoftUSART_Data
= 0x0FFF;
397 SoftUSART_BitCount
= BITS_IN_USART_FRAME
;
401 static void XPROGTarget_SetTxMode(void)
403 #if defined(XPROG_VIA_HARDWARE_USART)
404 /* Wait for a full cycle of the clock */
405 while (PIND
& (1 << 5));
406 while (!(PIND
& (1 << 5)));
411 UCSR1B
&= ~(1 << RXEN1
);
412 UCSR1B
|= (1 << TXEN1
);
416 while (SoftUSART_BitCount
);
418 /* Wait for a full cycle of the clock */
419 SoftUSART_Data
= 0x0001;
420 SoftUSART_BitCount
= 1;
421 while (SoftUSART_BitCount
);
423 if (XPROG_SelectedProtocol
== XPRG_PROTOCOL_PDI
)
425 BITBANG_PDIDATA_PORT
|= BITBANG_PDIDATA_MASK
;
426 BITBANG_PDIDATA_DDR
|= BITBANG_PDIDATA_MASK
;
430 BITBANG_TPIDATA_PORT
|= BITBANG_TPIDATA_MASK
;
431 BITBANG_TPIDATA_DDR
|= BITBANG_TPIDATA_MASK
;
438 static void XPROGTarget_SetRxMode(void)
440 #if defined(XPROG_VIA_HARDWARE_USART)
441 while (!(UCSR1A
& (1 << TXC1
)));
442 UCSR1A
|= (1 << TXC1
);
444 UCSR1B
&= ~(1 << TXEN1
);
445 UCSR1B
|= (1 << RXEN1
);
450 while (SoftUSART_BitCount
);
452 if (XPROG_SelectedProtocol
== XPRG_PROTOCOL_PDI
)
454 BITBANG_PDIDATA_DDR
&= ~BITBANG_PDIDATA_MASK
;
455 BITBANG_PDIDATA_PORT
&= ~BITBANG_PDIDATA_MASK
;
459 BITBANG_TPIDATA_DDR
&= ~BITBANG_TPIDATA_MASK
;
460 BITBANG_TPIDATA_PORT
&= ~BITBANG_TPIDATA_MASK
;
463 /* Wait until DATA line has been pulled up to idle by the target */
464 while (!(BITBANG_PDIDATA_PIN
& BITBANG_PDIDATA_MASK
) && TimeoutMSRemaining
)
466 /* Manage software timeout */
467 if (TIFR0
& (1 << OCF0A
))
469 TIFR0
|= (1 << OCF0A
);
470 TimeoutMSRemaining
--;
475 if (TimeoutMSRemaining
)
476 TimeoutMSRemaining
= COMMAND_TIMEOUT_MS
;