Projects/AVRISP/AVRISP.txt

   1 /** \file
   2  *
   3  *  This file contains special DoxyGen information for the generation of the main page and other special
   4  *  documentation pages. It is not a project source file.
   5  */
   6
   7 /** \mainpage AVRISP MKII Programmer Project
   8  *
   9  *  \section SSec_Compat Project Compatibility:
  10  *
  11  *  The following list indicates what microcontrollers are compatible with this project.
  12  *
  13  *  - Series 7 USB AVRs
  14  *  - Series 6 USB AVRs
  15  *  - Series 4 USB AVRs
  16  *  - Series 2 USB AVRs (8KB versions with reduced features only)
  17  *
  18  *  \section SSec_Info USB Information:
  19  *
  20  *  The following table gives a rundown of the USB utilization of this project.
  21  *
  22  * <table>
  23  *  <tr>
  24  *   <td><b>USB Mode:</b></td>
  25  *   <td>Device</td>
  26  *  </tr>
  27  *  <tr>
  28  *   <td><b>USB Class:</b></td>
  29  *   <td>Vendor Specific Class</td>
  30  *  </tr>
  31  *  <tr>
  32  *   <td><b>USB Subclass:</b></td>
  33  *   <td>N/A</td>
  34  *  </tr>
  35  *  <tr>
  36  *   <td><b>Relevant Standards:</b></td>
  37  *   <td>Atmel AVRISP MKII Protocol Specification</td>
  38  *  </tr>
  39  *  <tr>
  40  *   <td><b>Usable Speeds:</b></td>
  41  *   <td>Full Speed Mode</td>
  42  *  </tr>
  43  * </table>
  44  *
  45  *  \section SSec_Description Project Description:
  46  *
  47  *  Firmware for an AVRStudio compatible AVRISP-MKII clone programmer. This project will enable the USB AVR series of
  48  *  microcontrollers to act as a clone of the official Atmel AVRISP-MKII programmer, usable within AVRStudio. In its
  49  *  most basic form, it allows for the programming of 5V AVRs from within AVRStudio with no special hardware other than
  50  *  the USB AVR and the parts needed for the USB interface. If the user desires, more advanced circuits incorporating
  51  *  level conversion can be made to allow for the programming of 3.3V AVR designs.
  52  *
  53  *  This device spoofs Atmel's official AVRISP-MKII device PID so that it remains compatible with Atmel's AVRISP-MKII
  54  *  drivers. When prompted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio.
  55  *
  56  *  Note that this design currently has several limitations:
  57  *    - Minimum ISP target clock speed of 500KHz due to hardware SPI used
  58  *    - No reversed/shorted target connector detection and notification
  59  *
  60  *  On AVR models with an ADC converter, AVCC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be
  61  *  set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models
  62  *  without an ADC converter, VTARGET will report at a fixed 5V level.
  63  *
  64  *  When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the
  65  *  XPLAIN's XMEGA AVR, and will enable PDI only programming support (since ISP mode is not needed).
  66  *
  67  *  While this application can be compiled for USB AVRs with as little as 8KB of FLASH, for full functionality 16KB or more
  68  *  of FLASH is required. On 8KB devices, either ISP or PDI programming support can be disabled to reduce program size.
  69  *
  70  *  \section Sec_ISP ISP Connections
  71  *  Connections to the device for SPI programming (when enabled):
  72  *
  73  *  <table>
  74  *   <tr>
  75  *    <td><b>Programmer Pin:</b></td>
  76  *    <td><b>Target Device Pin:</b></td>
  77  *    <td><b>ISP 6 Pin Layout:</b></td>
  78  *   </tr>
  79  *   <tr>
  80  *    <td>MISO</td>
  81  *    <td>PDO</td>
  82  *    <td>1</td>
  83  *   </tr>
  84  *   <tr>
  85  *    <td>ADCx <b><sup>1</sup></b></td>
  86  *    <td>VTARGET</td>
  87  *    <td>2</td>
  88  *   </tr>
  89  *   <tr>
  90  *    <td>SCLK</td>
  91  *    <td>SCLK</td>
  92  *    <td>3</td>
  93  *   </tr>
  94  *   <tr>
  95  *    <td>MOSI</td>
  96  *    <td>PDI</td>
  97  *    <td>4</td>
  98  *   </tr>
  99  *   <tr>
 100  *    <td>PORTx.y <b><sup>2</sup></b></td>
 101  *    <td>/RESET</td>
 102  *    <td>5</td>
 103  *   </tr>
 104  *   <tr>
 105  *    <td>GND</td>
 106  *    <td>GND</td>
 107  *    <td>6</td>
 108  *   </tr>
 109  *  </table>
 110  *
 111  *  <b><sup>1</sup></b> <i>Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only</i> \n
 112  *  <b><sup>2</sup></b> <i>See \ref SSec_Options section</i>
 113  *
 114  *  \section Sec_PDI PDI Connections
 115  *  Connections to the device for PDI programming<b><sup>1</sup></b> (when enabled):
 116  *
 117  *  <table>
 118  *   <tr>
 119  *    <td><b>Programmer Pin:</b></td>
 120  *    <td><b>Target Device Pin:</b></td>
 121  *    <td><b>PDI 6 Pin Layout:</b></td>
 122  *   </tr>
 123  *   <tr>
 124  *    <td>MISO</td>
 125  *    <td>DATA</td>
 126  *    <td>1</td>
 127  *   </tr>
 128  *   <tr>
 129  *    <td>ADCx <b><sup>1</sup></b></td>
 130  *    <td>VTARGET</td>
 131  *    <td>2</td>
 132  *   </tr>
 133  *   <tr>
 134  *    <td>N/A</td>
 135  *    <td>N/A</td>
 136  *    <td>3</td>
 137  *   </tr>
 138  *   <tr>
 139  *    <td>N/A</td>
 140  *    <td>N/A</td>
 141  *    <td>4</td>
 142  *   </tr>
 143  *   <tr>
 144  *    <td>PORTx.y <b><sup>2</sup></b></td>
 145  *    <td>CLOCK</td>
 146  *    <td>5</td>
 147  *   </tr>
 148  *   <tr>
 149  *    <td>GND</td>
 150  *    <td>GND</td>
 151  *    <td>6</td>
 152  *   </tr>
 153  *  </table>
 154  *
 155  *  <b><sup>1</sup></b> <i>When PDI_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together
 156  *                         via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i>
 157  *
 158  *  \section SSec_Options Project Options
 159  *
 160  *  The following defines can be found in this project, which can control the project behaviour when defined, or changed in value.
 161  *
 162  *  <table>
 163  *   <tr>
 164  *    <td><b>Define Name:</b></td>
 165  *    <td><b>Location:</b></td>
 166  *    <td><b>Description:</b></td>
 167  *   </tr>
 168  *   <tr>
 169  *    <td>RESET_LINE_PORT</td>
 170  *    <td>Makefile CDEFS</td>
 171  *    <td>PORT register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
 172  *   </tr>
 173  *   <tr>
 174  *    <td>RESET_LINE_PIN</td>
 175  *    <td>Makefile CDEFS</td>
 176  *    <td>PIN register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
 177  *   </tr>
 178  *   <tr>
 179  *    <td>RESET_LINE_DDR</td>
 180  *    <td>Makefile CDEFS</td>
 181  *    <td>DDR register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
 182  *   </tr>
 183  *   <tr>
 184  *    <td>RESET_LINE_MASK</td>
 185  *    <td>Makefile CDEFS</td>
 186  *    <td>Mask for the programmer's target RESET line on the chosen port. <b>Must not be the AVR's /SS pin</b>, as the
 187  *        target pins are tri-stated when not in use, and low signals on the /SS pin will force SPI slave mode when the
 188  *        pin is configured as an input. When in PDI programming mode, this is the target clock pin.
 189  *        <i>Ignored when compiled for the XPLAIN board.</i></td>
 190  *   </tr>
 191  *   <tr>
 192  *    <td>VTARGET_ADC_CHANNEL</td>
 193  *    <td>Makefile CDEFS</td>
 194  *    <td>ADC channel number (on supported AVRs) to use for VTARGET level detection.</td>
 195  *   </tr>
 196  *   <tr>
 197  *    <td>ENABLE_ISP_PROTOCOL</td>
 198  *    <td>Makefile CDEFS</td>
 199  *    <td>Define to enable SPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>
 200  *   </tr>
 201  *   <tr>
 202  *    <td>ENABLE_PDI_PROTOCOL</td>
 203  *    <td>Makefile CDEFS</td>
 204  *    <td>Define to enable XMEGA PDI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>
 205  *   </tr>
 206  *   <tr>
 207  *    <td>PDI_VIA_HARDWARE_USART</td>
 208  *    <td>Makefile CDEFS</td>
 209  *    <td>Define to force the PDI protocol (when enabled) to use the much faster hardware USART instead of bit-banging to
 210  *        match the official AVRISP pinout. This breaks pinout compatibility with the official AVRISP MKII (and requires
 211  *        seperate ISP and PDI programming headers) but increases programming speed dramatically.
 212  *        <i>Ignored when compiled for the XPLAIN board.</i></td>
 213  *   </tr>
 214  *  </table>
 215  */