3 Copyright (C) Dean Camera, 2009.
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
10 Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
12 Permission to use, copy, modify, and distribute this software
13 and its documentation for any purpose and without fee is hereby
14 granted, provided that the above copyright notice appear in all
15 copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
33 * Target-related functions for the PDI Protocol decoder.
36 #define INCLUDE_FROM_XPROGTARGET_C
37 #include "XPROGTarget.h"
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
42 volatile bool IsSending
;
44 #if !defined(XPROG_VIA_HARDWARE_USART)
45 /** Software USART raw frame bits for transmission/reception. */
46 volatile uint16_t SoftUSART_Data
;
48 /** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
49 #define SoftUSART_BitCount GPIOR2
52 /** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */
53 ISR(TIMER1_COMPA_vect
, ISR_BLOCK
)
55 /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
56 BITBANG_PDICLOCK_PIN
|= BITBANG_PDICLOCK_MASK
;
58 /* If not sending or receiving, just exit */
59 if (!(SoftUSART_BitCount
))
62 /* Check to see if we are at a rising or falling edge of the clock */
63 if (BITBANG_PDICLOCK_PORT
& BITBANG_PDICLOCK_MASK
)
65 /* If at rising clock edge and we are in send mode, abort */
69 /* Wait for the start bit when receiving */
70 if ((SoftUSART_BitCount
== BITS_IN_USART_FRAME
) && (BITBANG_PDIDATA_PIN
& BITBANG_PDIDATA_MASK
))
73 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
74 * be discarded leaving the data to be byte-aligned for quick access */
75 if (BITBANG_PDIDATA_PIN
& BITBANG_PDIDATA_MASK
)
76 ((uint8_t*)&SoftUSART_Data
)[1] |= (1 << (BITS_IN_USART_FRAME
- 9));
83 /* If at falling clock edge and we are in receive mode, abort */
87 /* Set the data line to the next bit value */
88 if (((uint8_t*)&SoftUSART_Data
)[0] & 0x01)
89 BITBANG_PDIDATA_PORT
|= BITBANG_PDIDATA_MASK
;
91 BITBANG_PDIDATA_PORT
&= ~BITBANG_PDIDATA_MASK
;
98 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
99 ISR(TIMER1_COMPB_vect
, ISR_BLOCK
)
101 /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
102 BITBANG_TPICLOCK_PIN
|= BITBANG_TPICLOCK_MASK
;
104 /* If not sending or receiving, just exit */
105 if (!(SoftUSART_BitCount
))
108 /* Check to see if we are at a rising or falling edge of the clock */
109 if (BITBANG_TPICLOCK_PORT
& BITBANG_TPICLOCK_MASK
)
111 /* If at rising clock edge and we are in send mode, abort */
115 /* Wait for the start bit when receiving */
116 if ((SoftUSART_BitCount
== BITS_IN_USART_FRAME
) && (BITBANG_TPIDATA_PIN
& BITBANG_TPIDATA_MASK
))
119 /* Shift in the bit one less than the frame size in position, so that the start bit will eventually
120 * be discarded leaving the data to be byte-aligned for quick access */
121 if (BITBANG_TPIDATA_PIN
& BITBANG_TPIDATA_MASK
)
122 ((uint8_t*)&SoftUSART_Data
)[1] |= (1 << (BITS_IN_USART_FRAME
- 9));
124 SoftUSART_Data
>>= 1;
125 SoftUSART_BitCount
--;
129 /* If at falling clock edge and we are in receive mode, abort */
133 /* Set the data line to the next bit value */
134 if (((uint8_t*)&SoftUSART_Data
)[0] & 0x01)
135 BITBANG_TPIDATA_PORT
|= BITBANG_TPIDATA_MASK
;
137 BITBANG_TPIDATA_PORT
&= ~BITBANG_TPIDATA_MASK
;
139 SoftUSART_Data
>>= 1;
140 SoftUSART_BitCount
--;
145 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
146 void XPROGTarget_EnableTargetPDI(void)
150 #if defined(XPROG_VIA_HARDWARE_USART)
151 /* Set Tx and XCK as outputs, Rx as input */
152 DDRD
|= (1 << 5) | (1 << 3);
155 /* Set DATA line high for at least 90ns to disable /RESET functionality */
157 asm volatile ("NOP"::);
158 asm volatile ("NOP"::);
160 /* Set up the synchronous USART for XMEGA communications -
161 8 data bits, even parity, 2 stop bits */
162 UBRR1
= (F_CPU
/ 1000000UL);
163 UCSR1B
= (1 << TXEN1
);
164 UCSR1C
= (1 << UMSEL10
) | (1 << UPM11
) | (1 << USBS1
) | (1 << UCSZ11
) | (1 << UCSZ10
) | (1 << UCPOL1
);
166 /* Set DATA and CLOCK lines to outputs */
167 BITBANG_PDIDATA_DDR
|= BITBANG_PDIDATA_MASK
;
168 BITBANG_PDICLOCK_DDR
|= BITBANG_PDICLOCK_MASK
;
170 /* Set DATA line high for at least 90ns to disable /RESET functionality */
171 BITBANG_PDIDATA_PORT
|= BITBANG_PDIDATA_MASK
;
172 asm volatile ("NOP"::);
173 asm volatile ("NOP"::);
175 /* Fire timer compare channel A ISR to manage the software USART */
176 OCR1A
= BITS_BETWEEN_USART_CLOCKS
;
177 TCCR1B
= (1 << WGM12
) | (1 << CS10
);
178 TIMSK1
= (1 << OCIE1A
);
181 /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
182 XPROGTarget_SendBreak();
183 XPROGTarget_SendBreak();
186 /** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
187 void XPROGTarget_EnableTargetTPI(void)
191 /* Set /RESET line low for at least 90ns to enable TPI functionality */
192 RESET_LINE_DDR
|= RESET_LINE_MASK
;
193 RESET_LINE_PORT
&= ~RESET_LINE_MASK
;
194 asm volatile ("NOP"::);
195 asm volatile ("NOP"::);
197 #if defined(XPROG_VIA_HARDWARE_USART)
198 /* Set Tx and XCK as outputs, Rx as input */
199 DDRD
|= (1 << 5) | (1 << 3);
202 /* Set up the synchronous USART for XMEGA communications -
203 8 data bits, even parity, 2 stop bits */
204 UBRR1
= (F_CPU
/ 1000000UL);
205 UCSR1B
= (1 << TXEN1
);
206 UCSR1C
= (1 << UMSEL10
) | (1 << UPM11
) | (1 << USBS1
) | (1 << UCSZ11
) | (1 << UCSZ10
) | (1 << UCPOL1
);
208 /* Set DATA and CLOCK lines to outputs */
209 BITBANG_TPIDATA_DDR
|= BITBANG_TPIDATA_MASK
;
210 BITBANG_TPICLOCK_DDR
|= BITBANG_TPICLOCK_MASK
;
212 /* Set DATA line high for idle state */
213 BITBANG_TPIDATA_PORT
|= BITBANG_TPIDATA_MASK
;
215 /* Fire timer capture channel B ISR to manage the software USART */
216 OCR1B
= BITS_BETWEEN_USART_CLOCKS
;
217 TCCR1B
= (1 << WGM12
) | (1 << CS10
);
218 TIMSK1
= (1 << OCIE1B
);
221 /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
222 XPROGTarget_SendBreak();
223 XPROGTarget_SendBreak();
226 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
227 void XPROGTarget_DisableTargetPDI(void)
229 #if defined(XPROG_VIA_HARDWARE_USART)
230 /* Turn off receiver and transmitter of the USART, clear settings */
231 UCSR1A
|= (1 << TXC1
) | (1 << RXC1
);
235 /* Set all USART lines as input, tristate */
236 DDRD
&= ~((1 << 5) | (1 << 3));
237 PORTD
&= ~((1 << 5) | (1 << 3) | (1 << 2));
239 /* Set DATA and CLOCK lines to inputs */
240 BITBANG_PDIDATA_DDR
&= ~BITBANG_PDIDATA_MASK
;
241 BITBANG_PDICLOCK_DDR
&= ~BITBANG_PDICLOCK_MASK
;
243 /* Tristate DATA and CLOCK lines */
244 BITBANG_PDIDATA_PORT
&= ~BITBANG_PDIDATA_MASK
;
245 BITBANG_PDICLOCK_PORT
&= ~BITBANG_PDICLOCK_MASK
;
249 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */
250 void XPROGTarget_DisableTargetTPI(void)
252 #if defined(XPROG_VIA_HARDWARE_USART)
253 /* Turn off receiver and transmitter of the USART, clear settings */
254 UCSR1A
|= (1 << TXC1
) | (1 << RXC1
);
258 /* Set all USART lines as input, tristate */
259 DDRD
&= ~((1 << 5) | (1 << 3));
260 PORTD
&= ~((1 << 5) | (1 << 3) | (1 << 2));
262 /* Set DATA and CLOCK lines to inputs */
263 BITBANG_TPIDATA_DDR
&= ~BITBANG_TPIDATA_MASK
;
264 BITBANG_TPICLOCK_DDR
&= ~BITBANG_TPICLOCK_MASK
;
266 /* Tristate DATA and CLOCK lines */
267 BITBANG_TPIDATA_PORT
&= ~BITBANG_TPIDATA_MASK
;
268 BITBANG_TPICLOCK_PORT
&= ~BITBANG_TPICLOCK_MASK
;
271 /* Tristate target /RESET line */
272 RESET_LINE_DDR
&= ~RESET_LINE_MASK
;
273 RESET_LINE_PORT
&= ~RESET_LINE_MASK
;
276 /** Sends a byte via the USART.
278 * \param[in] Byte Byte to send through the USART
280 void XPROGTarget_SendByte(const uint8_t Byte
)
282 #if defined(XPROG_VIA_HARDWARE_USART)
283 /* Switch to Tx mode if currently in Rx mode */
289 UCSR1B
|= (1 << TXEN1
);
290 UCSR1B
&= ~(1 << RXEN1
);
295 /* Wait until there is space in the hardware Tx buffer before writing */
296 while (!(UCSR1A
& (1 << UDRE1
)));
297 UCSR1A
|= (1 << TXC1
);
300 /* Switch to Tx mode if currently in Rx mode */
303 BITBANG_PDIDATA_PORT
|= BITBANG_PDIDATA_MASK
;
304 BITBANG_PDIDATA_DDR
|= BITBANG_PDIDATA_MASK
;
309 /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
310 uint16_t NewUSARTData
= ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte
<< 1) | (0 << 0));
312 /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
313 uint8_t ParityData
= Byte
;
316 NewUSARTData
^= (1 << 9);
317 ParityData
&= (ParityData
- 1);
320 /* Wait until transmitter is idle before writing new data */
321 while (SoftUSART_BitCount
);
323 /* Data shifted out LSB first, START DATA PARITY STOP STOP */
324 SoftUSART_Data
= NewUSARTData
;
325 SoftUSART_BitCount
= BITS_IN_USART_FRAME
;
329 /** Receives a byte via the software USART, blocking until data is received.
331 * \return Received byte from the USART
333 uint8_t XPROGTarget_ReceiveByte(void)
335 #if defined(XPROG_VIA_HARDWARE_USART)
336 /* Switch to Rx mode if currently in Tx mode */
339 while (!(UCSR1A
& (1 << TXC1
)));
340 UCSR1A
|= (1 << TXC1
);
342 UCSR1B
&= ~(1 << TXEN1
);
343 UCSR1B
|= (1 << RXEN1
);
351 /* Wait until a byte has been received before reading */
352 while (!(UCSR1A
& (1 << RXC1
)) && TimeoutMSRemaining
);
355 /* Switch to Rx mode if currently in Tx mode */
358 while (SoftUSART_BitCount
);
360 BITBANG_PDIDATA_DDR
&= ~BITBANG_PDIDATA_MASK
;
361 BITBANG_PDIDATA_PORT
&= ~BITBANG_PDIDATA_MASK
;
366 /* Wait until a byte has been received before reading */
367 SoftUSART_BitCount
= BITS_IN_USART_FRAME
;
368 while (SoftUSART_BitCount
&& TimeoutMSRemaining
);
370 /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
371 return (uint8_t)SoftUSART_Data
;
375 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
376 void XPROGTarget_SendBreak(void)
378 #if defined(XPROG_VIA_HARDWARE_USART)
379 /* Switch to Tx mode if currently in Rx mode */
385 UCSR1B
&= ~(1 << RXEN1
);
386 UCSR1B
|= (1 << TXEN1
);
391 /* Need to do nothing for a full frame to send a BREAK */
392 for (uint8_t i
= 0; i
< BITS_IN_USART_FRAME
; i
++)
394 /* Wait for a full cycle of the clock */
395 while (PIND
& (1 << 5));
396 while (!(PIND
& (1 << 5)));
399 /* Switch to Tx mode if currently in Rx mode */
402 BITBANG_PDIDATA_PORT
|= BITBANG_PDIDATA_MASK
;
403 BITBANG_PDIDATA_DDR
|= BITBANG_PDIDATA_MASK
;
408 while (SoftUSART_BitCount
);
410 /* Need to do nothing for a full frame to send a BREAK */
411 SoftUSART_Data
= 0x0FFF;
412 SoftUSART_BitCount
= BITS_IN_USART_FRAME
;