Projects/AVRISP/Lib/PDITarget.c

   1 /*
   2              LUFA Library
   3      Copyright (C) Dean Camera, 2009.
   4
   5   dean [at] fourwalledcubicle [dot] com
   6       www.fourwalledcubicle.com
   7 */
   8
   9 /*
  10   Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)
  11
  12   Permission to use, copy, modify, and distribute this software
  13   and its documentation for any purpose and without fee is hereby
  14   granted, provided that the above copyright notice appear in all
  15   copies and that both that the copyright notice and this
  16   permission notice and warranty disclaimer appear in supporting
  17   documentation, and that the name of the author not be used in
  18   advertising or publicity pertaining to distribution of the
  19   software without specific, written prior permission.
  20
  21   The author disclaim all warranties with regard to this
  22   software, including all implied warranties of merchantability
  23   and fitness.  In no event shall the author be liable for any
  24   special, indirect or consequential damages or any damages
  25   whatsoever resulting from loss of use, data or profits, whether
  26   in an action of contract, negligence or other tortious action,
  27   arising out of or in connection with the use or performance of
  28   this software.
  29 */
  30
  31 /** \file
  32  *
  33  *  Target-related functions for the PDI Protocol decoder.
  34  */
  35
  36 #define  INCLUDE_FROM_PDITARGET_C
  37 #include "PDITarget.h"
  38
  39 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
  40
  41 /** Flag to indicate if the USART is currently in Tx or Rx mode. */
  42 volatile bool     IsSending;
  43
  44 #if !defined(PDI_VIA_HARDWARE_USART)
  45 /** Software USART raw frame bits for transmission/reception. */
  46 volatile uint16_t SoftUSART_Data;
  47
  48 /** Bits remaining to be sent or received via the software USART. */
  49 volatile uint8_t  SoftUSART_BitCount;
  50
  51
  52 /** ISR to manage the software USART when bit-banged USART mode is selected. */
  53 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
  54 {
  55         /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
  56         BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
  57
  58         /* If not sending or receiving, just exit */
  59         if (!(SoftUSART_BitCount))
  60           return;
  61
  62         /* Check to see if the current clock state is on the rising or falling edge */
  63         bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);
  64
  65         if (IsSending && !IsRisingEdge)
  66         {
  67                 if (SoftUSART_Data & 0x01)
  68                   BITBANG_PDIDATA_PORT |=  BITBANG_PDIDATA_MASK;
  69                 else
  70                   BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
  71
  72                 SoftUSART_Data >>= 1;
  73                 SoftUSART_BitCount--;
  74         }
  75         else if (!IsSending && IsRisingEdge)
  76         {
  77                 /* Wait for the start bit when receiving */
  78                 if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
  79                   return;
  80
  81                 if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
  82                   SoftUSART_Data |= (1 << BITS_IN_FRAME);
  83
  84                 SoftUSART_Data >>= 1;
  85                 SoftUSART_BitCount--;
  86         }
  87 }
  88 #endif
  89
  90 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
  91 void PDITarget_EnableTargetPDI(void)
  92 {
  93 #if defined(PDI_VIA_HARDWARE_USART)
  94         /* Set Tx and XCK as outputs, Rx as input */
  95         DDRD |=  (1 << 5) | (1 << 3);
  96         DDRD &= ~(1 << 2);
  97
  98         /* Set DATA line high for at least 90ns to disable /RESET functionality */
  99         PORTD |= (1 << 3);
 100         asm volatile ("NOP"::);
 101         asm volatile ("NOP"::);
 102
 103         /* Set up the synchronous USART for XMEGA communications -
 104            8 data bits, even parity, 2 stop bits */
 105         UBRR1  = (F_CPU / 1000000UL);
 106         UCSR1B = (1 << TXEN1);
 107         UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 108
 109         /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
 110         PDITarget_SendBreak();
 111         PDITarget_SendBreak();
 112 #else
 113         /* Set DATA and CLOCK lines to outputs */
 114         BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 115         BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;
 116
 117         /* Set DATA line high for at least 90ns to disable /RESET functionality */
 118         BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 119         asm volatile ("NOP"::);
 120         asm volatile ("NOP"::);
 121
 122         /* Fire timer compare ISR every 100 cycles to manage the software USART */
 123         OCR1A   = 100;
 124         TCCR1B  = (1 << WGM12) | (1 << CS10);
 125         TIMSK1  = (1 << OCIE1A);
 126
 127         PDITarget_SendBreak();
 128         PDITarget_SendBreak();
 129 #endif
 130 }
 131
 132 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */
 133 void PDITarget_DisableTargetPDI(void)
 134 {
 135 #if defined(PDI_VIA_HARDWARE_USART)
 136         /* Turn off receiver and transmitter of the USART, clear settings */
 137         UCSR1A |= (1 << TXC1) | (1 << RXC1);
 138         UCSR1B  = 0;
 139         UCSR1C  = 0;
 140
 141         /* Set all USART lines as input, tristate */
 142         DDRD  &= ~((1 << 5) | (1 << 3));
 143         PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 144 #else
 145         /* Set DATA and CLOCK lines to inputs */
 146         BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 147         BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
 148
 149         /* Tristate DATA and CLOCK lines */
 150         BITBANG_PDIDATA_PORT  &= ~BITBANG_PDIDATA_MASK;
 151         BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
 152
 153         TCCR0B  = 0;
 154 #endif
 155 }
 156
 157 /** Sends a byte via the USART.
 158  *
 159  *  \param[in] Byte  Byte to send through the USART
 160  */
 161 void PDITarget_SendByte(uint8_t Byte)
 162 {
 163 #if defined(PDI_VIA_HARDWARE_USART)
 164         /* Switch to Tx mode if currently in Rx mode */
 165         if (!(IsSending))
 166         {
 167                 PORTD  |=  (1 << 3);
 168                 DDRD   |=  (1 << 3);
 169
 170                 UCSR1B |=  (1 << TXEN1);
 171                 UCSR1B &= ~(1 << RXEN1);
 172
 173                 IsSending = true;
 174         }
 175
 176         /* Wait until there is space in the hardware Tx buffer before writing */
 177         while (!(UCSR1A & (1 << UDRE1)));
 178         UCSR1A |= (1 << TXC1);
 179         UDR1    = Byte;
 180 #else
 181         /* Switch to Tx mode if currently in Rx mode */
 182         if (!(IsSending))
 183         {
 184                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 185                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 186
 187                 IsSending = true;
 188         }
 189
 190         bool    EvenParityBit = false;
 191         uint8_t ParityData    = Byte;
 192
 193         /* Compute Even parity bit */
 194         for (uint8_t i = 0; i < 8; i++)
 195         {
 196                 EvenParityBit ^= ParityData & 0x01;
 197                 ParityData    >>= 1;
 198         }
 199
 200         while (SoftUSART_BitCount);
 201
 202         /* Data shifted out LSB first, START DATA PARITY STOP STOP */
 203         SoftUSART_Data     = ((uint16_t)EvenParityBit << 9) | ((uint16_t)Byte << 1) | (1 << 10) | (1 << 11);
 204         SoftUSART_BitCount = BITS_IN_FRAME;
 205 #endif
 206 }
 207
 208 /** Receives a byte via the software USART, blocking until data is received.
 209  *
 210  *  \return Received byte from the USART
 211  */
 212 uint8_t PDITarget_ReceiveByte(void)
 213 {
 214 #if defined(PDI_VIA_HARDWARE_USART)
 215         /* Switch to Rx mode if currently in Tx mode */
 216         if (IsSending)
 217         {
 218                 while (!(UCSR1A & (1 << TXC1)));
 219                 UCSR1A |=  (1 << TXC1);
 220
 221                 UCSR1B &= ~(1 << TXEN1);
 222                 UCSR1B |=  (1 << RXEN1);
 223
 224                 DDRD   &= ~(1 << 3);
 225                 PORTD  &= ~(1 << 3);
 226
 227                 IsSending = false;
 228         }
 229
 230         /* Wait until a byte has been received before reading */
 231         while (!(UCSR1A & (1 << RXC1)));
 232         return UDR1;
 233 #else
 234         /* Switch to Rx mode if currently in Tx mode */
 235         if (IsSending)
 236         {
 237                 while (SoftUSART_BitCount);
 238
 239                 BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 240                 BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
 241
 242                 IsSending = false;
 243         }
 244
 245         /* Wait until a byte has been received before reading */
 246         SoftUSART_BitCount = BITS_IN_FRAME;
 247         while (SoftUSART_BitCount);
 248
 249         /* Throw away the start, parity and stop bits to leave only the data */
 250         return (uint8_t)(SoftUSART_Data >> 1);
 251 #endif
 252 }
 253
 254 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
 255 void PDITarget_SendBreak(void)
 256 {
 257 #if defined(PDI_VIA_HARDWARE_USART)
 258         /* Switch to Tx mode if currently in Rx mode */
 259         if (!(IsSending))
 260         {
 261                 PORTD  |=  (1 << 3);
 262                 DDRD   |=  (1 << 3);
 263
 264                 UCSR1B &= ~(1 << RXEN1);
 265                 UCSR1B |=  (1 << TXEN1);
 266
 267                 IsSending = true;
 268         }
 269
 270         /* Need to do nothing for a full frame to send a BREAK */
 271         for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)
 272         {
 273                 /* Wait for a full cycle of the clock */
 274                 while (PIND & (1 << 5));
 275                 while (!(PIND & (1 << 5)));
 276         }
 277 #else
 278         /* Switch to Tx mode if currently in Rx mode */
 279         if (!(IsSending))
 280         {
 281                 BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
 282                 BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;
 283
 284                 IsSending = true;
 285         }
 286
 287         while (SoftUSART_BitCount);
 288
 289         /* Need to do nothing for a full frame to send a BREAK */
 290         SoftUSART_Data     = 0x0FFF;
 291         SoftUSART_BitCount = BITS_IN_FRAME;
 292 #endif
 293 }
 294
 295 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
 296  *  calculation.
 297  *
 298  *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
 299  */
 300 bool PDITarget_WaitWhileNVMBusBusy(void)
 301 {
 302         TCNT0 = 0;
 303
 304         /* Poll the STATUS register to check to see if NVM access has been enabled */
 305         while (TCNT0 < PDI_NVM_TIMEOUT_MS)
 306         {
 307                 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
 308                 PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
 309                 if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
 310                   return true;
 311         }
 312
 313         return false;
 314 }
 315
 316 #endif